X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Fcortex_a8.c;h=18edd95a9236cb0e1bda1e386cdaeeaa67945806;hb=48d51e1719c2b48509786bba7c84c09d329929d3;hp=1ac0a30357728c9451f064e00fc2016b1bcd6cfb;hpb=a4a2808c2a849eddd5d7d454c048ffdfd89ca9c6;p=openocd.git

diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c
index 1ac0a30357..18edd95a92 100644
--- a/src/target/cortex_a8.c
+++ b/src/target/cortex_a8.c
@@ -1603,7 +1603,7 @@ static int cortex_a8_init_arch_info(struct target *target,
 //	arm7_9->handle_target_request = cortex_a8_handle_target_request;
 
 	/* REVISIT v7a setup should be in a v7a-specific routine */
-	armv4_5_init_arch_info(target, armv4_5);
+	arm_init_arch_info(target, armv4_5);
 	armv7a->common_magic = ARMV7_COMMON_MAGIC;
 
 	target_register_timer_callback(cortex_a8_handle_target_request, 1, 1, target);
@@ -1642,13 +1642,13 @@ COMMAND_HANDLER(cortex_a8_handle_dbginit_command)
 static const struct command_registration cortex_a8_exec_command_handlers[] = {
 	{
 		.name = "cache_info",
-		.handler = &cortex_a8_handle_cache_info_command,
+		.handler = cortex_a8_handle_cache_info_command,
 		.mode = COMMAND_EXEC,
 		.help = "display information about target caches",
 	},
 	{
 		.name = "dbginit",
-		.handler = &cortex_a8_handle_dbginit_command,
+		.handler = cortex_a8_handle_dbginit_command,
 		.mode = COMMAND_EXEC,
 		.help = "Initialize core debug",
 	},
@@ -1686,7 +1686,8 @@ struct target_type cortexa8_target = {
 	.deassert_reset = cortex_a8_deassert_reset,
 	.soft_reset_halt = NULL,
 
-	.get_gdb_reg_list = armv4_5_get_gdb_reg_list,
+	/* REVISIT allow exporting VFP3 registers ... */
+	.get_gdb_reg_list = arm_get_gdb_reg_list,
 
 	.read_memory = cortex_a8_read_memory,
 	.write_memory = cortex_a8_write_memory,