X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farmv8_dpm.h;h=c03935928b95ce6d9e492e8104b63c887e35d087;hb=78a4b6607ef29b901bffaf506da024bf4d0823a6;hp=48e2ca181245974d0b3040df5c398ab1292b4cf6;hpb=946958cb723f0b123505234275ce9a653ddbfbd2;p=openocd.git

diff --git a/src/target/armv8_dpm.h b/src/target/armv8_dpm.h
index 48e2ca1812..c03935928b 100644
--- a/src/target/armv8_dpm.h
+++ b/src/target/armv8_dpm.h
@@ -96,7 +96,7 @@ void armv8_dpm_report_wfar(struct arm_dpm *, uint64_t wfar);
 #define DRCR_RESTART			(1 << 1)
 #define DRCR_CLEAR_EXCEPTIONS	(1 << 2)
 
-/* PRCR (processor debug status register) bits */
+/* PRSR (processor debug status register) bits */
 #define PRSR_PU					(1 << 0)
 #define PRSR_SPD				(1 << 1)
 #define PRSR_RESET				(1 << 2)
@@ -110,7 +110,13 @@ void armv8_dpm_report_wfar(struct arm_dpm *, uint64_t wfar);
 #define PRSR_SPMAD				(1 << 10)
 #define PRSR_SDR				(1 << 11)
 
+/* PRCR (processor debug control register) bits */
+#define PRCR_CORENPDRQ			(1 << 0)
+#define PRCR_CWRR				(1 << 2)
+#define PRCR_COREPURQ			(1 << 3)
+
 void armv8_dpm_report_dscr(struct arm_dpm *dpm, uint32_t dcsr);
+void armv8_dpm_handle_exception(struct arm_dpm *dpm);
 enum arm_state armv8_dpm_get_core_state(struct arm_dpm *dpm);
 
 #endif /* OPENOCD_TARGET_ARM_DPM_H */