X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farmv8.h;h=1a611455db284a4d198780b1475d93bab24693bd;hb=1fbe8450a9dd99a66f6a4035652beb400deb9277;hp=b346462248fe3bead1fac06c6814cef385be5f43;hpb=09076d10dd553dc63f08e74aedb1b6aa030857f9;p=openocd.git diff --git a/src/target/armv8.h b/src/target/armv8.h index b346462248..1a611455db 100644 --- a/src/target/armv8.h +++ b/src/target/armv8.h @@ -113,6 +113,12 @@ enum { ARMV8_LAST_REG, }; +enum run_control_op { + ARMV8_RUNCONTROL_UNKNOWN = 0, + ARMV8_RUNCONTROL_RESUME = 1, + ARMV8_RUNCONTROL_HALT = 2, + ARMV8_RUNCONTROL_STEP = 3, +}; #define ARMV8_COMMON_MAGIC 0x0A450AAA @@ -164,7 +170,7 @@ struct armv8_cache_common { /* l2 external unified cache if some */ void *l2_cache; int (*flush_all_data_cache)(struct target *target); - int (*display_cache_info)(struct command_context *cmd_ctx, + int (*display_cache_info)(struct command_invocation *cmd, struct armv8_cache_common *armv8_cache); }; @@ -210,6 +216,9 @@ struct armv8_common { struct arm_cti *cti; + /* last run-control command issued to this target (resume, halt, step) */ + enum run_control_op last_run_control_op; + /* Direct processor core register read and writes */ int (*read_reg_u64)(struct armv8_common *armv8, int num, uint64_t *value); int (*write_reg_u64)(struct armv8_common *armv8, int num, uint64_t value); @@ -232,6 +241,11 @@ target_to_armv8(struct target *target) return container_of(target->arch_info, struct armv8_common, arm); } +static inline bool is_armv8(struct armv8_common *armv8) +{ + return armv8->common_magic == ARMV8_COMMON_MAGIC; +} + /* register offsets from armv8.debug_base */ #define CPUV8_DBG_MAINID0 0xD00 #define CPUV8_DBG_CPUFEATURE0 0xD20 @@ -247,6 +261,7 @@ target_to_armv8(struct target *target) #define CPUV8_DBG_WFAR1 0x34 #define CPUV8_DBG_DSCR 0x088 #define CPUV8_DBG_DRCR 0x090 +#define CPUV8_DBG_ECCR 0x098 #define CPUV8_DBG_PRCR 0x310 #define CPUV8_DBG_PRSR 0x314 @@ -286,7 +301,7 @@ int armv8_mmu_translate_va_pa(struct target *target, target_addr_t va, target_addr_t *val, int meminfo); int armv8_mmu_translate_va(struct target *target, target_addr_t va, target_addr_t *val); -int armv8_handle_cache_info_command(struct command_context *cmd_ctx, +int armv8_handle_cache_info_command(struct command_invocation *cmd, struct armv8_cache_common *armv8_cache); void armv8_set_cpsr(struct arm *arm, uint32_t cpsr);