X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farmv7m.c;h=f1f0ac967a0d91f90f3c8cd0dbddd4e2a2f7428a;hb=e6dac739cffdecc0c65254eb7b3f2942cfff0f68;hp=22ffb5e7d562895f007f0c5a9cb79e09b714aa26;hpb=e27696f6b04459e935a0a5f65f7f668cb02970dd;p=openocd.git

diff --git a/src/target/armv7m.c b/src/target/armv7m.c
index 22ffb5e7d5..f1f0ac967a 100644
--- a/src/target/armv7m.c
+++ b/src/target/armv7m.c
@@ -1,6 +1,7 @@
 /***************************************************************************
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
+ *                                                                         *
  *   Copyright (C) 2006 by Magnus Lundin                                   *
  *   lundin@mlu.mine.nu                                                    *
  *                                                                         *
@@ -62,7 +63,7 @@ char* armv7m_core_reg_list[] =
 	"sp", "lr", "pc",
 	"xPSR", "msp", "psp",
 	/* Registers accessed through MSR instructions */
-//	"apsr", "iapsr", "ipsr", "epsr",
+	/* "apsr", "iapsr", "ipsr", "epsr", */
 	"primask", "basepri", "faultmask", "control"
 };
 
@@ -73,7 +74,7 @@ char* armv7m_core_dbgreg_list[] =
 	"sp", "lr", "pc",
 	"xPSR", "msp", "psp",
 	/* Registers accessed through MSR instructions */
-//	"dbg_apsr", "iapsr", "ipsr", "epsr",
+	/* "dbg_apsr", "iapsr", "ipsr", "epsr", */
 	"primask", "basepri", "faultmask", "dbg_control"
 };
 
@@ -109,10 +110,12 @@ armv7m_core_reg_t armv7m_core_reg_list_arch_info[] =
 	{18, ARMV7M_REGISTER_CORE_GP, ARMV7M_MODE_ANY, NULL, NULL}, /* PSP */
 
 	/*  CORE_SP are accesible using MSR and MRS instructions */
+#if 0
 //	{0x00, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* APSR */
 //	{0x01, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* IAPSR */
 //	{0x05, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* IPSR */
 //	{0x06, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* EPSR */
+#endif
 
 	{0x10, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* PRIMASK */
 	{0x11, ARMV7M_REGISTER_CORE_SP, ARMV7M_MODE_ANY, NULL, NULL}, /* BASEPRI */
@@ -287,7 +290,7 @@ int armv7m_write_core_reg(struct target_s *target, int num)
 	if (retval != ERROR_OK)
 	{
 		ERROR("JTAG failure");
-		armv7m->core_cache->reg_list[num].dirty = 1;
+		armv7m->core_cache->reg_list[num].dirty = armv7m->core_cache->reg_list[num].valid;
 		return ERROR_JTAG_DEVICE_ERROR;
 	}
 	DEBUG("write core reg %i value 0x%x", num , reg_value);
@@ -318,11 +321,6 @@ int armv7m_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_
 	armv7m_common_t *armv7m = target->arch_info;
 	int i;
 	
-	if (target->state != TARGET_HALTED)
-	{
-		return ERROR_TARGET_NOT_HALTED;
-	}
-	
 	*reg_list_size = 26;
 	*reg_list = malloc(sizeof(reg_t*) * (*reg_list_size));
 	
@@ -331,7 +329,7 @@ int armv7m_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_
 	{
 		if (i < ARMV7NUMCOREREGS)
 			(*reg_list)[i] = &armv7m->process_context->reg_list[i];
-			//(*reg_list)[i] = &armv7m->core_cache->reg_list[i];
+			/* (*reg_list)[i] = &armv7m->core_cache->reg_list[i]; */
 		else
 			(*reg_list)[i] = &armv7m_gdb_dummy_fp_reg;
 	}
@@ -343,7 +341,7 @@ int armv7m_get_gdb_reg_list(target_t *target, reg_t **reg_list[], int *reg_list_
 
 int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_params, reg_param_t *reg_params, u32 entry_point, u32 exit_point, int timeout_ms, void *arch_info)
 {
-	// get pointers to arch-specific information
+	/* get pointers to arch-specific information */
 	armv7m_common_t *armv7m = target->arch_info;
 	armv7m_algorithm_t *armv7m_algorithm_info = arch_info;
 	enum armv7m_state core_state = armv7m->core_state;
@@ -471,13 +469,12 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_
 	return retval;
 }
 
-int armv7m_arch_state(struct target_s *target, char *buf, int buf_size)
+int armv7m_arch_state(struct target_s *target)
 {
 	/* get pointers to arch-specific information */
 	armv7m_common_t *armv7m = target->arch_info;
 	
-	snprintf(buf, buf_size,
-		 "target halted in %s state due to %s, current mode: %s %s\nxPSR: 0x%8.8x pc: 0x%8.8x",
+	USER("target halted in %s state due to %s, current mode: %s %s\nxPSR: 0x%8.8x pc: 0x%8.8x",
 		 armv7m_state_strings[armv7m->core_state],
 		 target_debug_reason_strings[target->debug_reason],
 		 armv7m_mode_strings[armv7m->core_mode],