X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farmv7m.c;h=d4f6309ff6f021cbfe5a882583a95c21f78dc91b;hb=068626fde4590a3d3e5e7a80a3ac07adb53b9b48;hp=132b786d566a2898130c24f554cb679726d1662d;hpb=dc1685ca25567fe75c8d50c825fb0303fbb66fac;p=openocd.git diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 132b786d56..d4f6309ff6 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -35,7 +35,6 @@ #endif #include "breakpoints.h" -#include "target.h" #include "armv7m.h" #include "algorithm.h" #include "register.h" @@ -59,35 +58,6 @@ static char *armv7m_exception_strings[] = "DebugMonitor", "RESERVED", "PendSV", "SysTick" }; -/* FIXME these dummies are IDENTICAL to the armv4_5, arm11, and armv7a - * ones... except for naming/scoping - */ -static uint8_t armv7m_gdb_dummy_fp_value[12]; - -static struct reg armv7m_gdb_dummy_fp_reg = -{ - .name = "GDB dummy floating-point register", - .value = armv7m_gdb_dummy_fp_value, - .dirty = 0, - .valid = 1, - .size = 96, - .arch_info = NULL, - .arch_type = 0, -}; - -static uint8_t armv7m_gdb_dummy_fps_value[4]; - -static struct reg armv7m_gdb_dummy_fps_reg = -{ - .name = "GDB dummy floating-point status register", - .value = armv7m_gdb_dummy_fps_value, - .dirty = 0, - .valid = 1, - .size = 32, - .arch_info = NULL, - .arch_type = 0, -}; - #ifdef ARMV7_GDB_HACKS uint8_t armv7m_gdb_dummy_cpsr_value[] = {0, 0, 0, 0}; @@ -99,7 +69,6 @@ struct reg armv7m_gdb_dummy_cpsr_reg = .valid = 1, .size = 32, .arch_info = NULL, - .arch_type = 0, }; #endif @@ -148,8 +117,6 @@ static const struct { #define ARMV7M_NUM_REGS ARRAY_SIZE(armv7m_regs) -static int armv7m_core_reg_arch_type = -1; - /** * Restores target context using the cache of core registers set up * by armv7m_build_reg_cache(), calling optional core-specific hooks. @@ -279,21 +246,6 @@ static int armv7m_write_core_reg(struct target *target, unsigned num) return ERROR_OK; } -/** Invalidates cache of core registers set up by armv7m_build_reg_cache(). */ -int armv7m_invalidate_core_regs(struct target *target) -{ - struct armv7m_common *armv7m = target_to_armv7m(target); - int i; - - for (i = 0; i < armv7m->core_cache->num_regs; i++) - { - armv7m->core_cache->reg_list[i].valid = 0; - armv7m->core_cache->reg_list[i].dirty = 0; - } - - return ERROR_OK; -} - /** * Returns generic ARM userspace registers to GDB. * GDB doesn't quite understand that most ARMs don't have floating point @@ -321,11 +273,8 @@ int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int } for (i = 16; i < 24; i++) - { - (*reg_list)[i] = &armv7m_gdb_dummy_fp_reg; - } - - (*reg_list)[24] = &armv7m_gdb_dummy_fps_reg; + (*reg_list)[i] = &arm_gdb_dummy_fp_reg; + (*reg_list)[24] = &arm_gdb_dummy_fps_reg; #ifdef ARMV7_GDB_HACKS /* use dummy cpsr reg otherwise gdb may try and set the thumb bit */ @@ -424,13 +373,13 @@ int armv7m_run_algorithm(struct target *target, if (!reg) { LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name); - exit(-1); + return ERROR_INVALID_ARGUMENTS; } if (reg->size != reg_params[i].size) { LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name); - exit(-1); + return ERROR_INVALID_ARGUMENTS; } // regvalue = buf_get_u32(reg_params[i].value, 0, 32); @@ -487,13 +436,13 @@ int armv7m_run_algorithm(struct target *target, if (!reg) { LOG_ERROR("BUG: register '%s' not found", reg_params[i].reg_name); - exit(-1); + return ERROR_INVALID_ARGUMENTS; } if (reg->size != reg_params[i].size) { LOG_ERROR("BUG: register '%s' size doesn't match reg_params[i].size", reg_params[i].reg_name); - exit(-1); + return ERROR_INVALID_ARGUMENTS; } buf_set_u32(reg_params[i].value, 0, 32, buf_get_u32(reg->value, 0, 32)); @@ -531,8 +480,7 @@ int armv7m_arch_state(struct target *target) LOG_USER("target halted due to %s, current mode: %s %s\n" "xPSR: %#8.8" PRIx32 " pc: %#8.8" PRIx32 " %csp: %#8.8" PRIx32, - Jim_Nvp_value2name_simple(nvp_target_debug_reason, - target->debug_reason)->name, + debug_reason_name(target), armv7m_mode_strings[armv7m->core_mode], armv7m_exception_string(armv7m->exception_number), buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0, 32), @@ -542,6 +490,10 @@ int armv7m_arch_state(struct target *target) return ERROR_OK; } +static const struct reg_arch_type armv7m_reg_type = { + .get = armv7m_get_core_reg, + .set = armv7m_set_core_reg, +}; /** Builds cache of architecturally defined registers. */ struct reg_cache *armv7m_build_reg_cache(struct target *target) @@ -554,16 +506,9 @@ struct reg_cache *armv7m_build_reg_cache(struct target *target) struct armv7m_core_reg *arch_info = calloc(num_regs, sizeof(struct armv7m_core_reg)); int i; - if (armv7m_core_reg_arch_type == -1) - { - armv7m_core_reg_arch_type = register_reg_arch_type(armv7m_get_core_reg, armv7m_set_core_reg); - } - - register_init_dummy(&armv7m_gdb_dummy_fps_reg); #ifdef ARMV7_GDB_HACKS register_init_dummy(&armv7m_gdb_dummy_cpsr_reg); #endif - register_init_dummy(&armv7m_gdb_dummy_fp_reg); /* Build the process context cache */ cache->name = "arm v7m registers"; @@ -583,7 +528,7 @@ struct reg_cache *armv7m_build_reg_cache(struct target *target) reg_list[i].value = calloc(1, 4); reg_list[i].dirty = 0; reg_list[i].valid = 0; - reg_list[i].arch_type = armv7m_core_reg_arch_type; + reg_list[i].type = &armv7m_reg_type; reg_list[i].arch_info = &arch_info[i]; } @@ -650,7 +595,7 @@ int armv7m_checksum_memory(struct target *target, } /* convert flash writing code into a buffer in target endianness */ - for (i = 0; i < (sizeof(cortex_m3_crc_code)/sizeof(uint16_t)); i++) + for (i = 0; i < ARRAY_SIZE(cortex_m3_crc_code); i++) if ((retval = target_write_u16(target, crc_algorithm->address + i*sizeof(uint16_t), cortex_m3_crc_code[i])) != ERROR_OK) { return retval; @@ -713,7 +658,7 @@ int armv7m_blank_check_memory(struct target *target, } /* convert flash writing code into a buffer in target endianness */ - for (i = 0; i < (sizeof(erase_check_code)/sizeof(uint16_t)); i++) + for (i = 0; i < ARRAY_SIZE(erase_check_code); i++) target_write_u16(target, erase_check_algorithm->address + i*sizeof(uint16_t), erase_check_code[i]); armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; @@ -765,19 +710,19 @@ int armv7m_blank_check_memory(struct target *target, */ COMMAND_HANDLER(handle_dap_baseaddr_command) { - struct target *target = get_current_target(cmd_ctx); + struct target *target = get_current_target(CMD_CTX); struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; uint32_t apsel, apselsave, baseaddr; int retval; apselsave = swjdp->apsel; - switch (argc) { + switch (CMD_ARGC) { case 0: apsel = swjdp->apsel; break; case 1: - COMMAND_PARSE_NUMBER(u32, args[0], apsel); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel); break; default: return ERROR_COMMAND_SYNTAX_ERROR; @@ -788,7 +733,7 @@ COMMAND_HANDLER(handle_dap_baseaddr_command) dap_ap_read_reg_u32(swjdp, 0xF8, &baseaddr); retval = swjdp_transaction_endcheck(swjdp); - command_print(cmd_ctx, "0x%8.8" PRIx32 "", baseaddr); + command_print(CMD_CTX, "0x%8.8" PRIx32 "", baseaddr); if (apselsave != apsel) dap_ap_select(swjdp, apselsave); @@ -802,7 +747,7 @@ COMMAND_HANDLER(handle_dap_baseaddr_command) */ COMMAND_HANDLER(handle_dap_apid_command) { - struct target *target = get_current_target(cmd_ctx); + struct target *target = get_current_target(CMD_CTX); struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; @@ -811,7 +756,7 @@ COMMAND_HANDLER(handle_dap_apid_command) COMMAND_HANDLER(handle_dap_apsel_command) { - struct target *target = get_current_target(cmd_ctx); + struct target *target = get_current_target(CMD_CTX); struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; @@ -820,7 +765,7 @@ COMMAND_HANDLER(handle_dap_apsel_command) COMMAND_HANDLER(handle_dap_memaccess_command) { - struct target *target = get_current_target(cmd_ctx); + struct target *target = get_current_target(CMD_CTX); struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; @@ -830,53 +775,68 @@ COMMAND_HANDLER(handle_dap_memaccess_command) COMMAND_HANDLER(handle_dap_info_command) { - struct target *target = get_current_target(cmd_ctx); + struct target *target = get_current_target(CMD_CTX); struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; uint32_t apsel; - switch (argc) { + switch (CMD_ARGC) { case 0: apsel = swjdp->apsel; break; case 1: - COMMAND_PARSE_NUMBER(u32, args[0], apsel); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel); break; default: return ERROR_COMMAND_SYNTAX_ERROR; } - return dap_info_command(cmd_ctx, swjdp, apsel); + return dap_info_command(CMD_CTX, swjdp, apsel); } -/** Registers commands used to access DAP resources. */ -int armv7m_register_commands(struct command_context *cmd_ctx) -{ - struct command *arm_adi_v5_dap_cmd; - - arm_adi_v5_dap_cmd = register_command(cmd_ctx, NULL, "dap", - NULL, COMMAND_ANY, - "cortex dap specific commands"); - - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "info", - handle_dap_info_command, COMMAND_EXEC, - "Displays dap info for ap [num]," - "default currently selected AP"); - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apsel", - handle_dap_apsel_command, COMMAND_EXEC, - "Select a different AP [num] (default 0)"); - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apid", - handle_dap_apid_command, COMMAND_EXEC, - "Displays id reg from AP [num], " - "default currently selected AP"); - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "baseaddr", - handle_dap_baseaddr_command, COMMAND_EXEC, - "Displays debug base address from AP [num]," - "default currently selected AP"); - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "memaccess", - handle_dap_memaccess_command, COMMAND_EXEC, - "set/get number of extra tck for mem-ap " - "memory bus access [0-255]"); - - return ERROR_OK; -} +static const struct command_registration armv7m_exec_command_handlers[] = { + { + .name = "info", + .handler = &handle_dap_info_command, + .mode = COMMAND_EXEC, + .help = "dap info for ap [num], " + "default currently selected AP", + }, + { + .name = "apsel", + .handler = &handle_dap_apsel_command, + .mode = COMMAND_EXEC, + .help = "select a different AP [num] (default 0)", + }, + { + .name = "apid", + .handler = &handle_dap_apid_command, + .mode = COMMAND_EXEC, + .help = "return id reg from AP [num], " + "default currently selected AP", + }, + { + .name = "baseaddr", + .handler = &handle_dap_baseaddr_command, + .mode = COMMAND_EXEC, + .help = "return debug base address from AP [num], " + "default currently selected AP", + }, + { + .name = "memaccess", + .handler = &handle_dap_memaccess_command, + .mode = COMMAND_EXEC, + .help = "set/get number of extra tck for mem-ap memory " + "bus access [0-255]", + }, + COMMAND_REGISTRATION_DONE +}; +const struct command_registration armv7m_command_handlers[] = { + { + .name = "dap", + .mode = COMMAND_ANY, + .help = "Cortex DAP command group", + .chain = armv7m_exec_command_handlers, + }, + COMMAND_REGISTRATION_DONE +};