X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farmv7m.c;h=056ac7b2d066a411f6048a595d7f848ca5a55276;hb=a851ce0d6f2b961f94e09746304e0fb0dad6a15f;hp=8c1de32e7b1dc98596e8e2ad83d6263c1b03b6bb;hpb=f4788652e45662d1e43933dc0620561bc4cddae0;p=openocd.git diff --git a/src/target/armv7m.c b/src/target/armv7m.c index 8c1de32e7b..056ac7b2d0 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -35,7 +35,6 @@ #endif #include "breakpoints.h" -#include "target.h" #include "armv7m.h" #include "algorithm.h" #include "register.h" @@ -59,33 +58,6 @@ static char *armv7m_exception_strings[] = "DebugMonitor", "RESERVED", "PendSV", "SysTick" }; -/* FIXME these dummies are IDENTICAL to the armv4_5, arm11, and armv7a - * ones... except for naming/scoping - */ -static uint8_t armv7m_gdb_dummy_fp_value[12]; - -static struct reg armv7m_gdb_dummy_fp_reg = -{ - .name = "GDB dummy floating-point register", - .value = armv7m_gdb_dummy_fp_value, - .dirty = 0, - .valid = 1, - .size = 96, - .arch_info = NULL, -}; - -static uint8_t armv7m_gdb_dummy_fps_value[4]; - -static struct reg armv7m_gdb_dummy_fps_reg = -{ - .name = "GDB dummy floating-point status register", - .value = armv7m_gdb_dummy_fps_value, - .dirty = 0, - .valid = 1, - .size = 32, - .arch_info = NULL, -}; - #ifdef ARMV7_GDB_HACKS uint8_t armv7m_gdb_dummy_cpsr_value[] = {0, 0, 0, 0}; @@ -274,21 +246,6 @@ static int armv7m_write_core_reg(struct target *target, unsigned num) return ERROR_OK; } -/** Invalidates cache of core registers set up by armv7m_build_reg_cache(). */ -int armv7m_invalidate_core_regs(struct target *target) -{ - struct armv7m_common *armv7m = target_to_armv7m(target); - int i; - - for (i = 0; i < armv7m->core_cache->num_regs; i++) - { - armv7m->core_cache->reg_list[i].valid = 0; - armv7m->core_cache->reg_list[i].dirty = 0; - } - - return ERROR_OK; -} - /** * Returns generic ARM userspace registers to GDB. * GDB doesn't quite understand that most ARMs don't have floating point @@ -316,11 +273,8 @@ int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int } for (i = 16; i < 24; i++) - { - (*reg_list)[i] = &armv7m_gdb_dummy_fp_reg; - } - - (*reg_list)[24] = &armv7m_gdb_dummy_fps_reg; + (*reg_list)[i] = &arm_gdb_dummy_fp_reg; + (*reg_list)[24] = &arm_gdb_dummy_fps_reg; #ifdef ARMV7_GDB_HACKS /* use dummy cpsr reg otherwise gdb may try and set the thumb bit */ @@ -328,7 +282,7 @@ int armv7m_get_gdb_reg_list(struct target *target, struct reg **reg_list[], int /* ARMV7M is always in thumb mode, try to make GDB understand this * if it does not support this arch */ - *((char*)armv7m->core_cache->reg_list[15].value) |= 1; + *((char*)armv7m->arm.pc->value) |= 1; #else (*reg_list)[25] = &armv7m->core_cache->reg_list[ARMV7M_xPSR]; #endif @@ -384,6 +338,9 @@ int armv7m_run_algorithm(struct target *target, int retval = ERROR_OK; uint32_t context[ARMV7M_NUM_REGS]; + /* NOTE: armv7m_run_algorithm requires that each algorithm uses a software breakpoint + * at the exit point */ + if (armv7m_algorithm_info->common_magic != ARMV7M_COMMON_MAGIC) { LOG_ERROR("current target isn't an ARMV7M target"); @@ -441,22 +398,8 @@ int armv7m_run_algorithm(struct target *target, armv7m->core_cache->reg_list[ARMV7M_CONTROL].valid = 1; } - /* REVISIT speed things up (3% or so in one case) by requiring - * algorithms to include a BKPT instruction at each exit point. - * This eliminates overheads of adding/removing a breakpoint. - */ - - /* ARMV7M always runs in Thumb state */ - if ((retval = breakpoint_add(target, exit_point, 2, BKPT_SOFT)) != ERROR_OK) - { - LOG_ERROR("can't add breakpoint to finish algorithm execution"); - return ERROR_TARGET_FAILURE; - } - retval = armv7m_run_and_wait(target, entry_point, timeout_ms, exit_point, armv7m); - breakpoint_remove(target, exit_point); - if (retval != ERROR_OK) { return retval; @@ -519,6 +462,7 @@ int armv7m_run_algorithm(struct target *target, int armv7m_arch_state(struct target *target) { struct armv7m_common *armv7m = target_to_armv7m(target); + struct arm *arm = &armv7m->arm; uint32_t ctrl, sp; ctrl = buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_CONTROL].value, 0, 32); @@ -526,12 +470,11 @@ int armv7m_arch_state(struct target *target) LOG_USER("target halted due to %s, current mode: %s %s\n" "xPSR: %#8.8" PRIx32 " pc: %#8.8" PRIx32 " %csp: %#8.8" PRIx32, - Jim_Nvp_value2name_simple(nvp_target_debug_reason, - target->debug_reason)->name, + debug_reason_name(target), armv7m_mode_strings[armv7m->core_mode], armv7m_exception_string(armv7m->exception_number), - buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_xPSR].value, 0, 32), - buf_get_u32(armv7m->core_cache->reg_list[ARMV7M_PC].value, 0, 32), + buf_get_u32(arm->cpsr->value, 0, 32), + buf_get_u32(arm->pc->value, 0, 32), (ctrl & 0x02) ? 'p' : 'm', sp); @@ -546,6 +489,7 @@ static const struct reg_arch_type armv7m_reg_type = { struct reg_cache *armv7m_build_reg_cache(struct target *target) { struct armv7m_common *armv7m = target_to_armv7m(target); + struct arm *arm = &armv7m->arm; int num_regs = ARMV7M_NUM_REGS; struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache); struct reg_cache *cache = malloc(sizeof(struct reg_cache)); @@ -553,11 +497,9 @@ struct reg_cache *armv7m_build_reg_cache(struct target *target) struct armv7m_core_reg *arch_info = calloc(num_regs, sizeof(struct armv7m_core_reg)); int i; - register_init_dummy(&armv7m_gdb_dummy_fps_reg); #ifdef ARMV7_GDB_HACKS register_init_dummy(&armv7m_gdb_dummy_cpsr_reg); #endif - register_init_dummy(&armv7m_gdb_dummy_fp_reg); /* Build the process context cache */ cache->name = "arm v7m registers"; @@ -581,19 +523,29 @@ struct reg_cache *armv7m_build_reg_cache(struct target *target) reg_list[i].arch_info = &arch_info[i]; } + arm->cpsr = reg_list + ARMV7M_xPSR; + arm->pc = reg_list + ARMV7M_PC; + arm->core_cache = cache; return cache; } /** Sets up target as a generic ARMv7-M core */ int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m) { - /* register arch-specific functions */ + struct arm *arm = &armv7m->arm; + + armv7m->common_magic = ARMV7M_COMMON_MAGIC; - target->arch_info = armv7m; + arm->core_type = ARM_MODE_THREAD; + arm->arch_info = armv7m; + + /* FIXME remove v7m-specific r/w core_reg functions; + * use the generic ARM core support.. + */ armv7m->read_core_reg = armv7m_read_core_reg; armv7m->write_core_reg = armv7m_write_core_reg; - return ERROR_OK; + return arm_init_arch_info(target, arm); } /** Generates a CRC32 checksum of a memory region. */ @@ -631,8 +583,7 @@ int armv7m_checksum_memory(struct target *target, /* ncomp: */ 0x429C, /* cmp r4, r3 */ 0xD1E9, /* bne nbyte */ - /* end: */ - 0xE7FE, /* b end */ + 0xBE00, /* bkpt #0 */ 0x1DB7, 0x04C1 /* CRC32XOR: .word 0x04C11DB7 */ }; @@ -644,7 +595,7 @@ int armv7m_checksum_memory(struct target *target, } /* convert flash writing code into a buffer in target endianness */ - for (i = 0; i < (sizeof(cortex_m3_crc_code)/sizeof(uint16_t)); i++) + for (i = 0; i < ARRAY_SIZE(cortex_m3_crc_code); i++) if ((retval = target_write_u16(target, crc_algorithm->address + i*sizeof(uint16_t), cortex_m3_crc_code[i])) != ERROR_OK) { return retval; @@ -696,8 +647,7 @@ int armv7m_blank_check_memory(struct target *target, 0xEA02, 0x0203, /* and r2, r2, r3 */ 0x3901, /* subs r1, r1, #1 */ 0xD1F9, /* bne loop */ - /* end: */ - 0xE7FE, /* b end */ + 0xBE00, /* bkpt #0 */ }; /* make sure we have a working area */ @@ -707,7 +657,7 @@ int armv7m_blank_check_memory(struct target *target, } /* convert flash writing code into a buffer in target endianness */ - for (i = 0; i < (sizeof(erase_check_code)/sizeof(uint16_t)); i++) + for (i = 0; i < ARRAY_SIZE(erase_check_code); i++) target_write_u16(target, erase_check_algorithm->address + i*sizeof(uint16_t), erase_check_code[i]); armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; @@ -743,13 +693,49 @@ int armv7m_blank_check_memory(struct target *target, return ERROR_OK; } +int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found) +{ + struct armv7m_common *armv7m = target_to_armv7m(target); + struct reg *r = armv7m->arm.pc; + bool result = false; + + + /* if we halted last time due to a bkpt instruction + * then we have to manually step over it, otherwise + * the core will break again */ + + if (target->debug_reason == DBG_REASON_BREAKPOINT) + { + uint16_t op; + uint32_t pc = buf_get_u32(r->value, 0, 32); + + pc &= ~1; + if (target_read_u16(target, pc, &op) == ERROR_OK) + { + if ((op & 0xFF00) == 0xBE00) + { + pc = buf_get_u32(r->value, 0, 32) + 2; + buf_set_u32(r->value, 0, 32, pc); + r->dirty = true; + r->valid = true; + result = true; + LOG_DEBUG("Skipping over BKPT instruction"); + } + } + } + + if (inst_found) { + *inst_found = result; + } + + return ERROR_OK; +} + /*--------------------------------------------------------------------------*/ /* * Only stuff below this line should need to verify that its target * is an ARMv7-M node. - * - * FIXME yet none of it _does_ verify target types yet! */ @@ -759,35 +745,16 @@ int armv7m_blank_check_memory(struct target *target, */ COMMAND_HANDLER(handle_dap_baseaddr_command) { - struct target *target = get_current_target(cmd_ctx); + struct target *target = get_current_target(CMD_CTX); struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; - uint32_t apsel, apselsave, baseaddr; - int retval; - apselsave = swjdp->apsel; - switch (argc) { - case 0: - apsel = swjdp->apsel; - break; - case 1: - COMMAND_PARSE_NUMBER(u32, args[0], apsel); - break; - default: - return ERROR_COMMAND_SYNTAX_ERROR; + if (!is_armv7m(armv7m)) { + command_print(CMD_CTX, "current target isn't an ARM7-M"); + return ERROR_TARGET_INVALID; } - if (apselsave != apsel) - dap_ap_select(swjdp, apsel); - - dap_ap_read_reg_u32(swjdp, 0xF8, &baseaddr); - retval = swjdp_transaction_endcheck(swjdp); - command_print(cmd_ctx, "0x%8.8" PRIx32 "", baseaddr); - - if (apselsave != apsel) - dap_ap_select(swjdp, apselsave); - - return retval; + return CALL_COMMAND_HANDLER(dap_baseaddr_command, swjdp); } /* @@ -796,81 +763,125 @@ COMMAND_HANDLER(handle_dap_baseaddr_command) */ COMMAND_HANDLER(handle_dap_apid_command) { - struct target *target = get_current_target(cmd_ctx); + struct target *target = get_current_target(CMD_CTX); struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; + if (!is_armv7m(armv7m)) { + command_print(CMD_CTX, "current target isn't an ARM7-M"); + return ERROR_TARGET_INVALID; + } + return CALL_COMMAND_HANDLER(dap_apid_command, swjdp); } COMMAND_HANDLER(handle_dap_apsel_command) { - struct target *target = get_current_target(cmd_ctx); + struct target *target = get_current_target(CMD_CTX); struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; + if (!is_armv7m(armv7m)) { + command_print(CMD_CTX, "current target isn't an ARM7-M"); + return ERROR_TARGET_INVALID; + } + return CALL_COMMAND_HANDLER(dap_apsel_command, swjdp); } COMMAND_HANDLER(handle_dap_memaccess_command) { - struct target *target = get_current_target(cmd_ctx); + struct target *target = get_current_target(CMD_CTX); struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; + if (!is_armv7m(armv7m)) { + command_print(CMD_CTX, "current target isn't an ARM7-M"); + return ERROR_TARGET_INVALID; + } + return CALL_COMMAND_HANDLER(dap_memaccess_command, swjdp); } COMMAND_HANDLER(handle_dap_info_command) { - struct target *target = get_current_target(cmd_ctx); + struct target *target = get_current_target(CMD_CTX); struct armv7m_common *armv7m = target_to_armv7m(target); struct swjdp_common *swjdp = &armv7m->swjdp_info; uint32_t apsel; - switch (argc) { + if (!is_armv7m(armv7m)) { + command_print(CMD_CTX, "current target isn't an ARM7-M"); + return ERROR_TARGET_INVALID; + } + + switch (CMD_ARGC) { case 0: apsel = swjdp->apsel; break; case 1: - COMMAND_PARSE_NUMBER(u32, args[0], apsel); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel); break; default: return ERROR_COMMAND_SYNTAX_ERROR; } - return dap_info_command(cmd_ctx, swjdp, apsel); + return dap_info_command(CMD_CTX, swjdp, apsel); } -/** Registers commands used to access DAP resources. */ -int armv7m_register_commands(struct command_context *cmd_ctx) -{ - struct command *arm_adi_v5_dap_cmd; - - arm_adi_v5_dap_cmd = register_command(cmd_ctx, NULL, "dap", - NULL, COMMAND_ANY, - "cortex dap specific commands"); - - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "info", - handle_dap_info_command, COMMAND_EXEC, - "Displays dap info for ap [num]," - "default currently selected AP"); - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apsel", - handle_dap_apsel_command, COMMAND_EXEC, - "Select a different AP [num] (default 0)"); - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apid", - handle_dap_apid_command, COMMAND_EXEC, - "Displays id reg from AP [num], " - "default currently selected AP"); - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "baseaddr", - handle_dap_baseaddr_command, COMMAND_EXEC, - "Displays debug base address from AP [num]," - "default currently selected AP"); - register_command(cmd_ctx, arm_adi_v5_dap_cmd, "memaccess", - handle_dap_memaccess_command, COMMAND_EXEC, - "set/get number of extra tck for mem-ap " - "memory bus access [0-255]"); - - return ERROR_OK; -} +/* FIXME this table should be part of generic DAP support, and + * be shared by the ARMv7-A/R and ARMv7-M support ... + */ +static const struct command_registration armv7m_exec_command_handlers[] = { + { + .name = "info", + .handler = handle_dap_info_command, + .mode = COMMAND_EXEC, + .help = "display ROM table for MEM-AP " + "(default currently selected AP)", + .usage = "[ap_num]", + }, + { + .name = "apsel", + .handler = handle_dap_apsel_command, + .mode = COMMAND_EXEC, + .help = "Set the currently selected AP (default 0) " + "and display the result", + .usage = "[ap_num]", + }, + { + .name = "apid", + .handler = handle_dap_apid_command, + .mode = COMMAND_EXEC, + .help = "return ID register from AP " + "(default currently selected AP)", + .usage = "[ap_num]", + }, + { + .name = "baseaddr", + .handler = handle_dap_baseaddr_command, + .mode = COMMAND_EXEC, + .help = "return debug base address from MEM-AP " + "(default currently selected AP)", + .usage = "[ap_num]", + }, + { + .name = "memaccess", + .handler = handle_dap_memaccess_command, + .mode = COMMAND_EXEC, + .help = "set/get number of extra tck for MEM-AP memory " + "bus access [0-255]", + .usage = "[cycles]", + }, + COMMAND_REGISTRATION_DONE +}; +const struct command_registration armv7m_command_handlers[] = { + { + .name = "dap", + .mode = COMMAND_EXEC, + .help = "Cortex DAP command group", + .chain = armv7m_exec_command_handlers, + }, + COMMAND_REGISTRATION_DONE +};