X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm_dpm.c;h=6bfe355ba2e0ed50ea40c687b77dba32f802c8fe;hb=762ddcb74948852b0dfb25fcbca0965b09249a2f;hp=72215f90b86ad0810b3d868569ee2a924489b1c2;hpb=6f88aa0fb3bb7a91b5327b75e8fb772ed6d3be2d;p=openocd.git

diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c
index 72215f90b8..6bfe355ba2 100644
--- a/src/target/arm_dpm.c
+++ b/src/target/arm_dpm.c
@@ -206,7 +206,7 @@ int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum)
 					LOG_WARNING("Jazelle PC adjustment unknown");
 					break;
 				default:
-					LOG_WARNING("unknow core state");
+					LOG_WARNING("unknown core state");
 					break;
 			}
 			break;
@@ -335,7 +335,7 @@ static int dpm_write_pc_core_state(struct arm_dpm *dpm, struct reg *r)
 }
 
 /**
- * Read basic registers of the the current context:  R0 to R15, and CPSR;
+ * Read basic registers of the current context:  R0 to R15, and CPSR;
  * sets the core mode (such as USR or IRQ) and state (such as ARM or Thumb).
  * In normal operation this is called on entry to halting debug state,
  * possibly after some other operations supporting restore of debug state