X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm_disassembler.h;h=e9f4d44cbb7066822483029bd7f5b129302f942c;hb=ce8937a987620cb32de0ccad60ea06c296850139;hp=4aee3519dc5d31ceca269783d43b0245870923b1;hpb=5e005f412962549916927d043946e6d3f506405a;p=openocd.git diff --git a/src/target/arm_disassembler.h b/src/target/arm_disassembler.h index 4aee3519dc..e9f4d44cbb 100644 --- a/src/target/arm_disassembler.h +++ b/src/target/arm_disassembler.h @@ -13,13 +13,11 @@ * GNU General Public License for more details. * * * * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * + * along with this program. If not, see . * ***************************************************************************/ -#ifndef ARM_DISASSEMBLER_H -#define ARM_DISASSEMBLER_H +#ifndef OPENOCD_TARGET_ARM_DISASSEMBLER_H +#define OPENOCD_TARGET_ARM_DISASSEMBLER_H enum arm_instruction_type { ARM_UNKNOWN_INSTUCTION, @@ -108,6 +106,8 @@ enum arm_instruction_type { ARM_MCRR, ARM_MRRC, ARM_PLD, + ARM_DSB, + ARM_ISB, ARM_QADD, ARM_QDADD, ARM_QSUB, @@ -203,4 +203,4 @@ int arm_access_size(struct arm_instruction *instruction); #define COND(opcode) (arm_condition_strings[(opcode & 0xf0000000) >> 28]) -#endif /* ARM_DISASSEMBLER_H */ +#endif /* OPENOCD_TARGET_ARM_DISASSEMBLER_H */