X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm_adi_v5.h;h=03a75f497d01ed9d0db9dcf51da24ad3ab67ff48;hb=47b5829db40459650866488ab46008fd8b7e191c;hp=ec4a179d8c4f2e4d66731d3ff94e4a09e124537b;hpb=db6c994642f29b7d47abb4233494a606fbb65369;p=openocd.git

diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h
index ec4a179d8c..03a75f497d 100644
--- a/src/target/arm_adi_v5.h
+++ b/src/target/arm_adi_v5.h
@@ -32,15 +32,11 @@
 
 #include "arm_jtag.h"
 
-/* JTAG instructions/registers for JTAG-DP and SWJ-DP */
-#define JTAG_DP_ABORT		0x8
+/* FIXME remove these JTAG-specific decls when mem_ap_read_buf_u32()
+ * is no longer JTAG-specific
+ */
 #define JTAG_DP_DPACC		0xA
 #define JTAG_DP_APACC		0xB
-#define JTAG_DP_IDCODE		0xE
-
-/* three-bit ACK values for DPACC and APACC reads */
-#define JTAG_ACK_OK_FAULT	0x2
-#define JTAG_ACK_WAIT		0x1
 
 /* three-bit ACK values for SWD access (sent LSB first) */
 #define SWD_ACK_OK		0x4
@@ -63,6 +59,9 @@
 #define DP_SELECT		0x8		/* JTAG: r/w; SWD: write */
 #define DP_RDBUFF		0xC		/* read-only */
 
+#define WCR_TO_TRN(wcr) (1 + (3 & ((wcr)) >> 8))	/* 1..4 clocks */
+#define WCR_TO_PRESCALE(wcr) (7 & ((wcr)))		/* impl defined */
+
 /* Fields of the DP's AP ABORT register */
 #define DAPABORT		(1 << 0)
 #define STKCMPCLR		(1 << 1)	/* SWD-only */
@@ -133,10 +132,8 @@
  * a choice made at board design time (by only using the SWD pins), or
  * as part of setting up a debug session (if all the dual-role JTAG/SWD
  * signals are available).
- *
- * @todo Rename "swjdp_common" as "dap".  Use of SWJ-DP is optional!
  */
-struct swjdp_common
+struct adiv5_dap
 {
 	const struct dap_ops *ops;
 
@@ -144,13 +141,16 @@ struct swjdp_common
 	/* Control config */
 	uint32_t dp_ctrl_stat;
 
+
+	uint32_t apsel;
+
 	/**
 	 * Cache for DP_SELECT bits identifying the current AP.  A DAP may
 	 * connect to multiple APs, such as one MEM-AP for general access,
 	 * another reserved for accessing debug modules, and a JTAG-DP.
 	 * "-1" indicates no cached value.
 	 */
-	uint32_t apsel;
+	uint32_t ap_current;
 
 	/**
 	 * Cache for DP_SELECT bits identifying the current four-word AP
@@ -184,7 +184,6 @@ struct swjdp_common
 	uint32_t	memaccess_tck;
 	/* Size of TAR autoincrement block, ARM ADI Specification requires at least 10 bits */
 	uint32_t tar_autoincr_block;
-
 };
 
 /**
@@ -201,27 +200,27 @@ struct dap_ops {
 	bool	is_swd;
 
 	/** Reads the DAP's IDCODe register. */
-	int (*queue_idcode_read)(struct swjdp_common *dap,
+	int (*queue_idcode_read)(struct adiv5_dap *dap,
 			uint8_t *ack, uint32_t *data);
 
 	/** DP register read. */
-	int (*queue_dp_read)(struct swjdp_common *dap, unsigned reg,
+	int (*queue_dp_read)(struct adiv5_dap *dap, unsigned reg,
 			uint32_t *data);
 	/** DP register write. */
-	int (*queue_dp_write)(struct swjdp_common *dap, unsigned reg,
+	int (*queue_dp_write)(struct adiv5_dap *dap, unsigned reg,
 			uint32_t data);
 
 	/** AP register read. */
-	int (*queue_ap_read)(struct swjdp_common *dap, unsigned reg,
+	int (*queue_ap_read)(struct adiv5_dap *dap, unsigned reg,
 			uint32_t *data);
 	/** AP register write. */
-	int (*queue_ap_write)(struct swjdp_common *dap, unsigned reg,
+	int (*queue_ap_write)(struct adiv5_dap *dap, unsigned reg,
 			uint32_t data);
 	/** AP operation abort. */
-	int (*queue_ap_abort)(struct swjdp_common *dap, uint8_t *ack);
+	int (*queue_ap_abort)(struct adiv5_dap *dap, uint8_t *ack);
 
 	/** Executes all queued DAP operations. */
-	int (*run)(struct swjdp_common *dap);
+	int (*run)(struct adiv5_dap *dap);
 };
 
 /**
@@ -235,9 +234,10 @@ struct dap_ops {
  *
  * @return ERROR_OK for success, else a fault code.
  */
-static inline int dap_queue_idcode_read(struct swjdp_common *dap,
+static inline int dap_queue_idcode_read(struct adiv5_dap *dap,
 		uint8_t *ack, uint32_t *data)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->queue_idcode_read(dap, ack, data);
 }
 
@@ -253,9 +253,10 @@ static inline int dap_queue_idcode_read(struct swjdp_common *dap,
  *
  * @return ERROR_OK for success, else a fault code.
  */
-static inline int dap_queue_dp_read(struct swjdp_common *dap,
+static inline int dap_queue_dp_read(struct adiv5_dap *dap,
 		unsigned reg, uint32_t *data)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->queue_dp_read(dap, reg, data);
 }
 
@@ -270,9 +271,10 @@ static inline int dap_queue_dp_read(struct swjdp_common *dap,
  *
  * @return ERROR_OK for success, else a fault code.
  */
-static inline int dap_queue_dp_write(struct swjdp_common *dap,
+static inline int dap_queue_dp_write(struct adiv5_dap *dap,
 		unsigned reg, uint32_t data)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->queue_dp_write(dap, reg, data);
 }
 
@@ -286,9 +288,10 @@ static inline int dap_queue_dp_write(struct swjdp_common *dap,
  *
  * @return ERROR_OK for success, else a fault code.
  */
-static inline int dap_queue_ap_read(struct swjdp_common *dap,
+static inline int dap_queue_ap_read(struct adiv5_dap *dap,
 		unsigned reg, uint32_t *data)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->queue_ap_read(dap, reg, data);
 }
 
@@ -301,9 +304,10 @@ static inline int dap_queue_ap_read(struct swjdp_common *dap,
  *
  * @return ERROR_OK for success, else a fault code.
  */
-static inline int dap_queue_ap_write(struct swjdp_common *dap,
+static inline int dap_queue_ap_write(struct adiv5_dap *dap,
 		unsigned reg, uint32_t data)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->queue_ap_write(dap, reg, data);
 }
 
@@ -318,8 +322,9 @@ static inline int dap_queue_ap_write(struct swjdp_common *dap,
  *
  * @return ERROR_OK for success, else a fault code.
  */
-static inline int dap_queue_ap_abort(struct swjdp_common *dap, uint8_t *ack)
+static inline int dap_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->queue_ap_abort(dap, ack);
 }
 
@@ -333,70 +338,91 @@ static inline int dap_queue_ap_abort(struct swjdp_common *dap, uint8_t *ack)
  *
  * @return ERROR_OK for success, else a fault code.
  */
-static inline int dap_run(struct swjdp_common *dap)
+static inline int dap_run(struct adiv5_dap *dap)
 {
+	assert(dap->ops != NULL);
 	return dap->ops->run(dap);
 }
 
 /** Accessor for currently selected DAP-AP number (0..255) */
-static inline uint8_t dap_ap_get_select(struct swjdp_common *swjdp)
+static inline uint8_t dap_ap_get_select(struct adiv5_dap *swjdp)
 {
-	return (uint8_t)(swjdp ->apsel >> 24);
+	return (uint8_t)(swjdp ->ap_current >> 24);
 }
 
 /* AP selection applies to future AP transactions */
-void dap_ap_select(struct swjdp_common *dap,uint8_t apsel);
+void dap_ap_select(struct adiv5_dap *dap,uint8_t ap);
 
 /* Queued AP transactions */
-int dap_setup_accessport(struct swjdp_common *swjdp,
+int dap_setup_accessport(struct adiv5_dap *swjdp,
 		uint32_t csw, uint32_t tar);
-int dap_ap_write_reg_u32(struct swjdp_common *swjdp,
-		uint32_t addr, uint32_t value);
-int dap_ap_read_reg_u32(struct swjdp_common *swjdp,
-		uint32_t addr, uint32_t *value);
-
-/* Queued JTAG ops must be completed with jtagdp_transaction_endcheck() */
-int jtagdp_transaction_endcheck(struct swjdp_common *swjdp);
 
 /* Queued MEM-AP memory mapped single word transfers */
-int mem_ap_read_u32(struct swjdp_common *swjdp, uint32_t address, uint32_t *value);
-int mem_ap_write_u32(struct swjdp_common *swjdp, uint32_t address, uint32_t value);
+int mem_ap_read_u32(struct adiv5_dap *swjdp, uint32_t address, uint32_t *value);
+int mem_ap_write_u32(struct adiv5_dap *swjdp, uint32_t address, uint32_t value);
 
 /* Synchronous MEM-AP memory mapped single word transfers */
-int mem_ap_read_atomic_u32(struct swjdp_common *swjdp,
+int mem_ap_read_atomic_u32(struct adiv5_dap *swjdp,
 		uint32_t address, uint32_t *value);
-int mem_ap_write_atomic_u32(struct swjdp_common *swjdp,
+int mem_ap_write_atomic_u32(struct adiv5_dap *swjdp,
 		uint32_t address, uint32_t value);
 
 /* MEM-AP memory mapped bus block transfers */
-int mem_ap_read_buf_u8(struct swjdp_common *swjdp,
+int mem_ap_read_buf_u8(struct adiv5_dap *swjdp,
 		uint8_t *buffer, int count, uint32_t address);
-int mem_ap_read_buf_u16(struct swjdp_common *swjdp,
+int mem_ap_read_buf_u16(struct adiv5_dap *swjdp,
 		uint8_t *buffer, int count, uint32_t address);
-int mem_ap_read_buf_u32(struct swjdp_common *swjdp,
+int mem_ap_read_buf_u32(struct adiv5_dap *swjdp,
 		uint8_t *buffer, int count, uint32_t address);
 
-int mem_ap_write_buf_u8(struct swjdp_common *swjdp,
+int mem_ap_write_buf_u8(struct adiv5_dap *swjdp,
 		uint8_t *buffer, int count, uint32_t address);
-int mem_ap_write_buf_u16(struct swjdp_common *swjdp,
+int mem_ap_write_buf_u16(struct adiv5_dap *swjdp,
 		uint8_t *buffer, int count, uint32_t address);
-int mem_ap_write_buf_u32(struct swjdp_common *swjdp,
+int mem_ap_write_buf_u32(struct adiv5_dap *swjdp,
 		uint8_t *buffer, int count, uint32_t address);
 
-/* Initialisation of the debug system, power domains and registers */
-int ahbap_debugport_init(struct swjdp_common *swjdp);
 
 
-/* Commands for user dap access */
-int dap_info_command(struct command_context *cmd_ctx,
-		struct swjdp_common *swjdp, int apsel);
+/* Queued MEM-AP memory mapped single word transfers with selection of ap */
+int mem_ap_sel_read_u32(struct adiv5_dap *swjdp, uint8_t ap,
+		uint32_t address, uint32_t *value);
+int mem_ap_sel_write_u32(struct adiv5_dap *swjdp, uint8_t ap,
+		uint32_t address, uint32_t value);
+
+/* Synchronous MEM-AP memory mapped single word transfers with selection of ap */
+int mem_ap_sel_read_atomic_u32(struct adiv5_dap *swjdp, uint8_t ap,
+		uint32_t address, uint32_t *value);
+int mem_ap_sel_write_atomic_u32(struct adiv5_dap *swjdp, uint8_t ap,
+		uint32_t address, uint32_t value);
+
+/* MEM-AP memory mapped bus block transfers with selection of ap */
+int mem_ap_sel_read_buf_u8(struct adiv5_dap *swjdp, uint8_t ap,
+		uint8_t *buffer, int count, uint32_t address);
+int mem_ap_sel_read_buf_u16(struct adiv5_dap *swjdp, uint8_t ap,
+		uint8_t *buffer, int count, uint32_t address);
+int mem_ap_sel_read_buf_u32(struct adiv5_dap *swjdp, uint8_t ap,
+		uint8_t *buffer, int count, uint32_t address);
 
-#define DAP_COMMAND_HANDLER(name) \
-		COMMAND_HELPER(name, struct swjdp_common *swjdp)
-DAP_COMMAND_HANDLER(dap_baseaddr_command);
-DAP_COMMAND_HANDLER(dap_memaccess_command);
-DAP_COMMAND_HANDLER(dap_apsel_command);
-DAP_COMMAND_HANDLER(dap_apid_command);
+int mem_ap_sel_write_buf_u8(struct adiv5_dap *swjdp, uint8_t ap,
+		uint8_t *buffer, int count, uint32_t address);
+int mem_ap_sel_write_buf_u16(struct adiv5_dap *swjdp, uint8_t ap,
+		uint8_t *buffer, int count, uint32_t address);
+int mem_ap_sel_write_buf_u32(struct adiv5_dap *swjdp, uint8_t ap,
+		uint8_t *buffer, int count, uint32_t address);
+
+
+
+/* Initialisation of the debug system, power domains and registers */
+int ahbap_debugport_init(struct adiv5_dap *swjdp);
+
+/* Probe the AP for ROM Table location */
+int dap_get_debugbase(struct adiv5_dap *dap, int ap,
+			uint32_t *dbgbase, uint32_t *apid);
+
+/* Lookup CoreSight component */
+int dap_lookup_cs_component(struct adiv5_dap *dap, int ap,
+			uint32_t dbgbase, uint8_t type, uint32_t *addr);
 
 struct target;
 
@@ -406,4 +432,6 @@ int dap_to_swd(struct target *target);
 /* Put debug link into JTAG mode */
 int dap_to_jtag(struct target *target);
 
+extern const struct command_registration dap_command_handlers[];
+
 #endif