X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm_adi_v5.c;h=72408e1e68fe8666975aff3a40879f477d16b252;hb=070259cadbb0f142f6546c55f8044199c6aea9b9;hp=751020fbc8e72f28dfb468775e80dd1ecc32f047;hpb=056fcdb540f0ab9a404f3b5de72fd707eb146603;p=openocd.git diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 751020fbc8..72408e1e68 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -1007,12 +1007,15 @@ int ahbap_debugport_init(struct swjdp_common *swjdp) return ERROR_OK; } -/* CID interpretation -- see ARM IHI 0029B section 3 */ +/* CID interpretation -- see ARM IHI 0029B section 3 + * and ARM IHI 0031A table 13-3. + */ static const char *class_description[16] ={ "Reserved", "ROM table", "Reserved", "Reserved", "Reserved", "Reserved", "Reserved", "Reserved", "Reserved", "CoreSight component", "Reserved", "Peripheral Test Block", - "Reserved", "DESS", "Generic IP component", "PrimeCell or System component" + "Reserved", "OptimoDE DESS", + "Generic IP component", "PrimeCell or System component" }; static bool @@ -1022,7 +1025,7 @@ is_dap_cid_ok(uint32_t cid3, uint32_t cid2, uint32_t cid1, uint32_t cid0) && ((cid1 & 0x0f) == 0) && cid0 == 0x0d; } -int dap_info_command(struct command_context_s *cmd_ctx, struct swjdp_common *swjdp, int apsel) +int dap_info_command(struct command_context *cmd_ctx, struct swjdp_common *swjdp, int apsel) { uint32_t dbgbase,apid; @@ -1370,12 +1373,12 @@ DAP_COMMAND_HANDLER(dap_baseaddr_command) int retval; apselsave = swjdp->apsel; - switch (argc) { + switch (CMD_ARGC) { case 0: apsel = swjdp->apsel; break; case 1: - COMMAND_PARSE_NUMBER(u32, args[0], apsel); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel); break; default: return ERROR_COMMAND_SYNTAX_ERROR; @@ -1386,7 +1389,7 @@ DAP_COMMAND_HANDLER(dap_baseaddr_command) dap_ap_read_reg_u32(swjdp, 0xF8, &baseaddr); retval = swjdp_transaction_endcheck(swjdp); - command_print(cmd_ctx, "0x%8.8" PRIx32, baseaddr); + command_print(CMD_CTX, "0x%8.8" PRIx32, baseaddr); if (apselsave != apsel) dap_ap_select(swjdp, apselsave); @@ -1398,19 +1401,19 @@ DAP_COMMAND_HANDLER(dap_memaccess_command) { uint32_t memaccess_tck; - switch (argc) { + switch (CMD_ARGC) { case 0: memaccess_tck = swjdp->memaccess_tck; break; case 1: - COMMAND_PARSE_NUMBER(u32, args[0], memaccess_tck); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], memaccess_tck); break; default: return ERROR_COMMAND_SYNTAX_ERROR; } swjdp->memaccess_tck = memaccess_tck; - command_print(cmd_ctx, "memory bus access delay set to %" PRIi32 " tck", + command_print(CMD_CTX, "memory bus access delay set to %" PRIi32 " tck", swjdp->memaccess_tck); return ERROR_OK; @@ -1421,12 +1424,12 @@ DAP_COMMAND_HANDLER(dap_apsel_command) uint32_t apsel, apid; int retval; - switch (argc) { + switch (CMD_ARGC) { case 0: apsel = 0; break; case 1: - COMMAND_PARSE_NUMBER(u32, args[0], apsel); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel); break; default: return ERROR_COMMAND_SYNTAX_ERROR; @@ -1435,7 +1438,7 @@ DAP_COMMAND_HANDLER(dap_apsel_command) dap_ap_select(swjdp, apsel); dap_ap_read_reg_u32(swjdp, 0xFC, &apid); retval = swjdp_transaction_endcheck(swjdp); - command_print(cmd_ctx, "ap %" PRIi32 " selected, identification register 0x%8.8" PRIx32, + command_print(CMD_CTX, "ap %" PRIi32 " selected, identification register 0x%8.8" PRIx32, apsel, apid); return retval; @@ -1447,12 +1450,12 @@ DAP_COMMAND_HANDLER(dap_apid_command) int retval; apselsave = swjdp->apsel; - switch (argc) { + switch (CMD_ARGC) { case 0: apsel = swjdp->apsel; break; case 1: - COMMAND_PARSE_NUMBER(u32, args[0], apsel); + COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel); break; default: return ERROR_COMMAND_SYNTAX_ERROR; @@ -1463,7 +1466,7 @@ DAP_COMMAND_HANDLER(dap_apid_command) dap_ap_read_reg_u32(swjdp, 0xFC, &apid); retval = swjdp_transaction_endcheck(swjdp); - command_print(cmd_ctx, "0x%8.8" PRIx32, apid); + command_print(CMD_CTX, "0x%8.8" PRIx32, apid); if (apselsave != apsel) dap_ap_select(swjdp, apselsave);