X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm9tdmi.c;h=fd5070314b30ccd08b94050ad5a6e8272d63b572;hb=bfa34f88f8b77596d6f70be446708a3f5a604e9b;hp=823e962ed0be22f618567594d5b3fdcfd8af1d46;hpb=12c143d5948355b3b54c9c0decc779177b22d5d9;p=openocd.git diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c index 823e962ed0..fd5070314b 100644 --- a/src/target/arm9tdmi.c +++ b/src/target/arm9tdmi.c @@ -87,30 +87,27 @@ int arm9tdmi_examine_debug_reason(struct target *target) uint8_t instructionbus[4]; uint8_t debug_reason; - jtag_set_end_state(TAP_DRPAUSE); - - fields[0].tap = arm7_9->jtag_info.tap; fields[0].num_bits = 32; fields[0].out_value = NULL; fields[0].in_value = databus; - fields[1].tap = arm7_9->jtag_info.tap; fields[1].num_bits = 3; fields[1].out_value = NULL; fields[1].in_value = &debug_reason; - fields[2].tap = arm7_9->jtag_info.tap; fields[2].num_bits = 32; fields[2].out_value = NULL; fields[2].in_value = instructionbus; - if ((retval = arm_jtag_scann(&arm7_9->jtag_info, 0x1)) != ERROR_OK) + if ((retval = arm_jtag_scann(&arm7_9->jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK) { return retval; } - arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL); + retval = arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL, TAP_DRPAUSE); + if (retval != ERROR_OK) + return retval; - jtag_add_dr_scan(3, fields, jtag_set_end_state(TAP_DRPAUSE)); + jtag_add_dr_scan(arm7_9->jtag_info.tap, 3, fields, TAP_DRPAUSE); if ((retval = jtag_execute_queue()) != ERROR_OK) { return retval; @@ -123,7 +120,7 @@ int arm9tdmi_examine_debug_reason(struct target *target) fields[2].in_value = NULL; fields[2].out_value = instructionbus; - jtag_add_dr_scan(3, fields, jtag_set_end_state(TAP_DRPAUSE)); + jtag_add_dr_scan(arm7_9->jtag_info.tap, 3, fields, TAP_DRPAUSE); if (debug_reason & 0x4) if (debug_reason & 0x2) @@ -157,25 +154,23 @@ int arm9tdmi_clock_out(struct arm_jtag *jtag_info, uint32_t instr, if (sysspeed) buf_set_u32(&sysspeed_buf, 2, 1, 1); - jtag_set_end_state(TAP_DRPAUSE); - if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK) + if ((retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK) { return retval; } - arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL); + retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE); + if (retval != ERROR_OK) + return retval; - fields[0].tap = jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = out_buf; fields[0].in_value = NULL; - fields[1].tap = jtag_info->tap; fields[1].num_bits = 3; fields[1].out_value = &sysspeed_buf; fields[1].in_value = NULL; - fields[2].tap = jtag_info->tap; fields[2].num_bits = 32; fields[2].out_value = instr_buf; fields[2].in_value = NULL; @@ -183,16 +178,16 @@ int arm9tdmi_clock_out(struct arm_jtag *jtag_info, uint32_t instr, if (in) { fields[0].in_value = (uint8_t *)in; - jtag_add_dr_scan(3, fields, jtag_get_end_state()); + jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_DRPAUSE); jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)in); } else { - jtag_add_dr_scan(3, fields, jtag_get_end_state()); + jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_DRPAUSE); } - jtag_add_runtest(0, jtag_get_end_state()); + jtag_add_runtest(0, TAP_DRPAUSE); #ifdef _DEBUG_INSTRUCTION_EXECUTION_ { @@ -219,34 +214,32 @@ int arm9tdmi_clock_data_in(struct arm_jtag *jtag_info, uint32_t *in) int retval = ERROR_OK;; struct scan_field fields[3]; - jtag_set_end_state(TAP_DRPAUSE); - if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK) + if ((retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK) { return retval; } - arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL); + retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE); + if (retval != ERROR_OK) + return retval; - fields[0].tap = jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = NULL; fields[0].in_value = (uint8_t *)in; - fields[1].tap = jtag_info->tap; fields[1].num_bits = 3; fields[1].out_value = NULL; fields[1].in_value = NULL; - fields[2].tap = jtag_info->tap; fields[2].num_bits = 32; fields[2].out_value = NULL; fields[2].in_value = NULL; - jtag_add_dr_scan(3, fields, jtag_get_end_state()); + jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_DRPAUSE); jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)in); - jtag_add_runtest(0, jtag_get_end_state()); + jtag_add_runtest(0, TAP_DRPAUSE); #ifdef _DEBUG_INSTRUCTION_EXECUTION_ { @@ -289,34 +282,32 @@ int arm9tdmi_clock_data_in_endianness(struct arm_jtag *jtag_info, int retval = ERROR_OK; struct scan_field fields[3]; - jtag_set_end_state(TAP_DRPAUSE); - if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK) + if ((retval = arm_jtag_scann(jtag_info, 0x1, TAP_DRPAUSE)) != ERROR_OK) { return retval; } - arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL); + retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL, TAP_DRPAUSE); + if (retval != ERROR_OK) + return retval; - fields[0].tap = jtag_info->tap; fields[0].num_bits = 32; fields[0].out_value = NULL; jtag_alloc_in_value32(&fields[0]); - fields[1].tap = jtag_info->tap; fields[1].num_bits = 3; fields[1].out_value = NULL; fields[1].in_value = NULL; - fields[2].tap = jtag_info->tap; fields[2].num_bits = 32; fields[2].out_value = NULL; fields[2].in_value = NULL; - jtag_add_dr_scan(3, fields, jtag_get_end_state()); + jtag_add_dr_scan(jtag_info->tap, 3, fields, TAP_DRPAUSE); jtag_add_callback4(arm9endianness, (jtag_callback_data_t)in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value); - jtag_add_runtest(0, jtag_get_end_state()); + jtag_add_runtest(0, TAP_DRPAUSE); #ifdef _DEBUG_INSTRUCTION_EXECUTION_ { @@ -677,7 +668,8 @@ static void arm9tdmi_branch_resume_thumb(struct target *target) /* fetch NOP, LDM in EXECUTE stage (1st cycle) */ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); /* nothing fetched, LDM in EXECUTE stage (2nd cycle) */ - arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32) | 1, NULL, 0); + arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, + buf_get_u32(armv4_5->pc->value, 0, 32) | 1, NULL, 0); /* nothing fetched, LDM in EXECUTE stage (3rd cycle) */ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0); @@ -798,7 +790,6 @@ int arm9tdmi_init_arch_info(struct target *target, arm7_9->post_debug_entry = NULL; arm7_9->pre_restore_context = NULL; - arm7_9->post_restore_context = NULL; /* initialize arch-specific breakpoint handling */ arm7_9->arm_bkpt = 0xdeeedeee; @@ -929,9 +920,9 @@ const struct command_registration arm9tdmi_command_handlers[] = { .chain = arm7_9_command_handlers, }, { - .name = "arm9tdmi", + .name = "arm9", .mode = COMMAND_ANY, - .help = "arm9tdmi command group", + .help = "arm9 command group", .chain = arm9tdmi_exec_command_handlers, }, COMMAND_REGISTRATION_DONE @@ -975,4 +966,5 @@ struct target_type arm9tdmi_target = .target_create = arm9tdmi_target_create, .init_target = arm9tdmi_init_target, .examine = arm7_9_examine, + .check_reset = arm7_9_check_reset, };