X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm9tdmi.c;h=595790bc9529a5c6e51b17c2fece24ea997df012;hb=da767f48da13464b6bd03b08270b529273c995f4;hp=1a53d0d08259a502073c210f7011f3ab8b833d94;hpb=22bc5194ae101282cf5c30d681d7f4720bec2534;p=openocd.git diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c index 1a53d0d082..595790bc95 100644 --- a/src/target/arm9tdmi.c +++ b/src/target/arm9tdmi.c @@ -57,6 +57,8 @@ target_type_t arm9tdmi_target = .poll = arm7_9_poll, .arch_state = armv4_5_arch_state, + .target_request_data = arm7_9_target_request_data, + .halt = arm7_9_halt, .resume = arm7_9_resume, .step = arm7_9_step, @@ -71,7 +73,8 @@ target_type_t arm9tdmi_target = .read_memory = arm7_9_read_memory, .write_memory = arm7_9_write_memory, .bulk_write_memory = arm7_9_bulk_write_memory, - + .checksum_memory = arm7_9_checksum_memory, + .run_algorithm = armv4_5_run_algorithm, .add_breakpoint = arm7_9_add_breakpoint, @@ -98,15 +101,6 @@ arm9tdmi_vector_t arm9tdmi_vectors[] = {0, 0}, }; -int arm9tdmi_jtag_error_handler(u8 *in_value, void *priv) -{ - char *caller = priv; - - DEBUG("caller: %s", caller); - - return ERROR_OK; -} - int arm9tdmi_examine_debug_reason(target_t *target) { /* get pointers to arch-specific information */ @@ -117,7 +111,6 @@ int arm9tdmi_examine_debug_reason(target_t *target) if ((target->debug_reason != DBG_REASON_DBGRQ) && (target->debug_reason != DBG_REASON_SINGLESTEP)) { - error_handler_t error_handler; scan_field_t fields[3]; u8 databus[4]; u8 instructionbus[4]; @@ -156,11 +149,9 @@ int arm9tdmi_examine_debug_reason(target_t *target) fields[2].in_handler_priv = NULL; arm_jtag_scann(&arm7_9->jtag_info, 0x1); - error_handler.error_handler = arm9tdmi_jtag_error_handler; - error_handler.error_handler_priv = "arm9tdmi_examine_debug_reason"; - arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, &error_handler); + arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL); - jtag_add_dr_scan(3, fields, TAP_PD, NULL); + jtag_add_dr_scan(3, fields, TAP_PD); jtag_execute_queue(); fields[0].in_value = NULL; @@ -170,7 +161,7 @@ int arm9tdmi_examine_debug_reason(target_t *target) fields[2].in_value = NULL; fields[2].out_value = instructionbus; - jtag_add_dr_scan(3, fields, TAP_PD, NULL); + jtag_add_dr_scan(3, fields, TAP_PD); if (debug_reason & 0x4) if (debug_reason & 0x2) @@ -187,7 +178,6 @@ int arm9tdmi_examine_debug_reason(target_t *target) /* put an instruction in the ARM9TDMI pipeline or write the data bus, and optionally read data */ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int sysspeed) { - error_handler_t error_handler; scan_field_t fields[3]; u8 out_buf[4]; u8 instr_buf[4]; @@ -204,10 +194,7 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s jtag_add_end_state(TAP_PD); arm_jtag_scann(jtag_info, 0x1); - error_handler.error_handler = arm9tdmi_jtag_error_handler; - error_handler.error_handler_priv = "arm9tdmi_clock_out"; - - arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, &error_handler); + arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL); fields[0].device = jtag_info->chain_pos; fields[0].num_bits = 32; @@ -247,7 +234,7 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s fields[2].in_handler = NULL; fields[2].in_handler_priv = NULL; - jtag_add_dr_scan(3, fields, -1, NULL); + jtag_add_dr_scan(3, fields, -1); jtag_add_runtest(0, -1); @@ -271,15 +258,11 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in) { scan_field_t fields[3]; - error_handler_t error_handler; jtag_add_end_state(TAP_PD); arm_jtag_scann(jtag_info, 0x1); - error_handler.error_handler = arm9tdmi_jtag_error_handler; - error_handler.error_handler_priv = "arm9tdmi_clock_data_in_endianness"; - - arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, &error_handler); + arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL); fields[0].device = jtag_info->chain_pos; fields[0].num_bits = 32; @@ -311,7 +294,7 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in) fields[2].in_handler = NULL; fields[2].in_handler_priv = NULL; - jtag_add_dr_scan(3, fields, -1, NULL); + jtag_add_dr_scan(3, fields, -1); jtag_add_runtest(0, -1); @@ -340,15 +323,11 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in) int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be) { scan_field_t fields[3]; - error_handler_t error_handler; jtag_add_end_state(TAP_PD); arm_jtag_scann(jtag_info, 0x1); - error_handler.error_handler = arm9tdmi_jtag_error_handler; - error_handler.error_handler_priv = "arm9tdmi_clock_data_in_endianness"; - - arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, &error_handler); + arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL); fields[0].device = jtag_info->chain_pos; fields[0].num_bits = 32; @@ -391,7 +370,7 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, fields[2].in_handler = NULL; fields[2].in_handler_priv = NULL; - jtag_add_dr_scan(3, fields, -1, NULL); + jtag_add_dr_scan(3, fields, -1); jtag_add_runtest(0, -1); @@ -874,16 +853,10 @@ void arm9tdmi_build_reg_cache(target_t *target) (*cache_p)->next = embeddedice_build_reg_cache(target, arm7_9); arm7_9->eice_cache = (*cache_p)->next; - if (arm7_9->has_etm) - { - (*cache_p)->next->next = etm_build_reg_cache(target, jtag_info, 0); - arm7_9->etm_cache = (*cache_p)->next->next; - } - - if (arm7_9->etb) + if (arm7_9->etm_ctx) { - (*cache_p)->next->next->next = etb_build_reg_cache(arm7_9->etb); - arm7_9->etb->reg_cache = (*cache_p)->next->next->next; + (*cache_p)->next->next = etm_build_reg_cache(target, jtag_info, arm7_9->etm_ctx); + arm7_9->etm_ctx->reg_cache = (*cache_p)->next->next; } } @@ -947,8 +920,8 @@ int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, int c arm7_9->post_restore_context = NULL; /* initialize arch-specific breakpoint handling */ - buf_set_u32((u8*)(&arm7_9->arm_bkpt), 0, 32, 0xdeeedeee); - buf_set_u32((u8*)(&arm7_9->thumb_bkpt), 0, 16, 0xdeee); + arm7_9->arm_bkpt = 0xdeeedeee; + arm7_9->thumb_bkpt = 0xdeee; arm7_9->sw_bkpts_use_wp = 1; arm7_9->sw_bkpts_enabled = 0;