X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm926ejs.c;h=e73097865ae6356b0c0e54e95b5339136d142eaf;hb=c6e80f63a3955baed6666e966ab1dd3950ea91b8;hp=c943f2fccdad9f04f25fb6767b34baaf335f731a;hpb=90465379e558ea7310867d9d39b79428c2050ddb;p=openocd.git

diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c
index c943f2fccd..e73097865a 100644
--- a/src/target/arm926ejs.c
+++ b/src/target/arm926ejs.c
@@ -22,12 +22,9 @@
 #endif
 
 #include "arm926ejs.h"
-#include "jtag.h"
-#include "log.h"
 #include "time_support.h"
+#include "target_type.h"
 
-#include <stdlib.h>
-#include <string.h>
 
 #if 0
 #define _DEBUG_INSTRUCTION_EXECUTION_
@@ -132,7 +129,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
 
 	buf_set_u32(address_buf, 0, 14, address);
 
-	jtag_add_end_state(TAP_IDLE);
+	jtag_set_end_state(TAP_IDLE);
 	if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
 	{
 		return retval;
@@ -142,8 +139,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
 	fields[0].tap = jtag_info->tap;
 	fields[0].num_bits = 32;
 	fields[0].out_value = NULL;
-	u8 tmp[4];
-	fields[0].in_value = tmp;
+	fields[0].in_value = (u8 *)value;
 
 
 	fields[1].tap = jtag_info->tap;
@@ -161,7 +157,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
 	fields[3].out_value = &nr_w_buf;
 	fields[3].in_value = NULL;
 
-	jtag_add_dr_scan(4, fields, TAP_INVALID);
+	jtag_add_dr_scan(4, fields, jtag_get_end_state());
 
 	/*TODO: add timeout*/
 	do
@@ -169,9 +165,9 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
 		/* rescan with NOP, to wait for the access to complete */
 		access = 0;
 		nr_w_buf = 0;
-		jtag_add_dr_scan_now(4, fields, TAP_INVALID);
+		jtag_add_dr_scan(4, fields, jtag_get_end_state());
 
-		*value=le_to_h_u32(tmp);
+		jtag_add_callback(arm_le_to_h_u32, (u8 *)value);
 
 		if ((retval = jtag_execute_queue()) != ERROR_OK)
 		{
@@ -204,7 +200,7 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u
 	buf_set_u32(address_buf, 0, 14, address);
 	buf_set_u32(value_buf, 0, 32, value);
 
-	jtag_add_end_state(TAP_IDLE);
+	jtag_set_end_state(TAP_IDLE);
 	if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
 	{
 		return retval;
@@ -231,14 +227,14 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u
 	fields[3].out_value = &nr_w_buf;
 	fields[3].in_value = NULL;
 
-	jtag_add_dr_scan(4, fields, TAP_INVALID);
+	jtag_add_dr_scan(4, fields, jtag_get_end_state());
 	/*TODO: add timeout*/
 	do
 	{
 		/* rescan with NOP, to wait for the access to complete */
 		access = 0;
 		nr_w_buf = 0;
-		jtag_add_dr_scan(4, fields, TAP_INVALID);
+		jtag_add_dr_scan(4, fields, jtag_get_end_state());
 		if ((retval = jtag_execute_queue()) != ERROR_OK)
 		{
 			return retval;