X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm7_9_common.h;h=04e29e05808904a6b30b7efe00d9398f3e8edd98;hb=f976af56a4352d0406b930528beec105df13cacb;hp=de6021072affdc374b15fe2613aa376ef7eff47c;hpb=526fe3d83e118d87af34353a7140c02f3f1a3c19;p=openocd.git diff --git a/src/target/arm7_9_common.h b/src/target/arm7_9_common.h index de6021072a..04e29e0580 100644 --- a/src/target/arm7_9_common.h +++ b/src/target/arm7_9_common.h @@ -2,9 +2,15 @@ * Copyright (C) 2005 by Dominic Rath * * Dominic.Rath@gmx.de * * * - * Copyright (C) 2007,2008 Øyvind Harboe * + * Copyright (C) 2007,2008 Øyvind Harboe * * oyvind.harboe@zylin.com * * * + * Copyright (C) 2008 by Spencer Oliver * + * spen@spen-soft.co.uk * + * * + * Copyright (C) 2008 by Hongtao Zheng * + * hontor@126.com * + * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * * the Free Software Foundation; either version 2 of the License, or * @@ -23,59 +29,57 @@ #ifndef ARM7_9_COMMON_H #define ARM7_9_COMMON_H -#include "armv4_5.h" -#include "arm_jtag.h" #include "breakpoints.h" -#include "target.h" - #include "etm.h" #define ARM7_9_COMMON_MAGIC 0x0a790a79 typedef struct arm7_9_common_s { - int common_magic; - + u32 common_magic; + arm_jtag_t jtag_info; reg_cache_t *eice_cache; - + u32 arm_bkpt; u16 thumb_bkpt; - int sw_bkpts_use_wp; + int sw_breakpoints_added; + int breakpoint_count; int wp_available; + int wp_available_max; int wp0_used; int wp1_used; - int sw_bkpts_enabled; + int wp1_used_default; int force_hw_bkpts; int dbgreq_adjust_pc; int use_dbgrq; int need_bypass_before_restart; - + etm_context_t *etm_ctx; - + int has_single_step; int has_monitor_mode; int has_vector_catch; - + int debug_entry_from_reset; - + struct working_area_s *dcc_working_area; - + int fast_memory_access; int dcc_downloads; int (*examine_debug_reason)(target_t *target); - + void (*change_to_arm)(target_t *target, u32 *r0, u32 *pc); - + void (*read_core_regs)(target_t *target, u32 mask, u32 *core_regs[16]); void (*read_core_regs_target_buffer)(target_t *target, u32 mask, void *buffer, int size); void (*read_xpsr)(target_t *target, u32 *xpsr, int spsr); - + void (*write_xpsr)(target_t *target, u32 xpsr, int spsr); void (*write_xpsr_im8)(target_t *target, u8 xpsr_im, int rot, int spsr); void (*write_core_regs)(target_t *target, u32 mask, u32 core_regs[16]); - + void (*load_word_regs)(target_t *target, u32 mask); void (*load_hword_reg)(target_t *target, int num); void (*load_byte_reg)(target_t *target, int num); @@ -83,22 +87,22 @@ typedef struct arm7_9_common_s void (*store_word_regs)(target_t *target, u32 mask); void (*store_hword_reg)(target_t *target, int num); void (*store_byte_reg)(target_t *target, int num); - + void (*write_pc)(target_t *target, u32 pc); void (*branch_resume)(target_t *target); void (*branch_resume_thumb)(target_t *target); - - void (*enable_single_step)(target_t *target); + + void (*enable_single_step)(target_t *target, u32 next_pc); void (*disable_single_step)(target_t *target); - + void (*set_special_dbgrq)(target_t *target); void (*pre_debug_entry)(target_t *target); void (*post_debug_entry)(target_t *target); - + void (*pre_restore_context)(target_t *target); void (*post_restore_context)(target_t *target); - + armv4_5_common_t armv4_5_common; void *arch_info; @@ -119,7 +123,6 @@ int arm7_9_soft_reset_halt(struct target_s *target); int arm7_9_prepare_reset_halt(struct target_s *target); int arm7_9_halt(target_t *target); -int arm7_9_debug_entry(target_t *target); int arm7_9_full_context(target_t *target); int arm7_9_restore_context(target_t *target); int arm7_9_resume(struct target_s *target, int current, u32 address, int handle_breakpoints, int debug_execution); @@ -138,7 +141,7 @@ int arm7_9_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint); int arm7_9_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint); int arm7_9_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint); -void arm7_9_enable_eice_step(target_t *target); +void arm7_9_enable_eice_step(target_t *target, u32 next_pc); void arm7_9_disable_eice_step(target_t *target); int arm7_9_execute_sys_speed(struct target_s *target); @@ -146,5 +149,4 @@ int arm7_9_execute_sys_speed(struct target_s *target); int arm7_9_init_arch_info(target_t *target, arm7_9_common_t *arm7_9); int arm7_9_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p); - #endif /* ARM7_9_COMMON_H */