X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm7_9_common.c;h=951aa5433b3884cfb2b15371e3d784c3f337c24d;hb=2b2f67118aee6112098194d4086e023c5d549b49;hp=7f0e3adb38826aa8d2b43a1d8308db7cef99aa31;hpb=edfb677d3466a0d88fe9bd5ec1d8785a41b6bc4e;p=openocd.git

diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index 7f0e3adb38..951aa5433b 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -350,12 +350,12 @@ static int arm7_9_unset_breakpoint(struct target *target, struct breakpoint *bre
 			if (retval != ERROR_OK)
 				return retval;
 			current_instr = target_buffer_get_u16(target, (uint8_t *)&current_instr);
-			if (current_instr == arm7_9->thumb_bkpt)
+			if (current_instr == arm7_9->thumb_bkpt) {
 				retval = target_write_memory(target,
 						breakpoint->address, 2, 1, breakpoint->orig_instr);
 				if (retval != ERROR_OK)
 					return retval;
-
+			}
 		}
 
 		if (--arm7_9->sw_breakpoint_count == 0) {
@@ -628,11 +628,11 @@ int arm7_9_execute_sys_speed(struct target *target)
 	/* set RESTART instruction */
 	if (arm7_9->need_bypass_before_restart) {
 		arm7_9->need_bypass_before_restart = 0;
-		retval = arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+		retval = arm_jtag_set_instr(jtag_info->tap, 0xf, NULL, TAP_IDLE);
 		if (retval != ERROR_OK)
 			return retval;
 	}
-	retval = arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+	retval = arm_jtag_set_instr(jtag_info->tap, 0x4, NULL, TAP_IDLE);
 	if (retval != ERROR_OK)
 		return retval;
 
@@ -682,11 +682,11 @@ static int arm7_9_execute_fast_sys_speed(struct target *target)
 	/* set RESTART instruction */
 	if (arm7_9->need_bypass_before_restart) {
 		arm7_9->need_bypass_before_restart = 0;
-		retval = arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+		retval = arm_jtag_set_instr(jtag_info->tap, 0xf, NULL, TAP_IDLE);
 		if (retval != ERROR_OK)
 			return retval;
 	}
-	retval = arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+	retval = arm_jtag_set_instr(jtag_info->tap, 0x4, NULL, TAP_IDLE);
 	if (retval != ERROR_OK)
 		return retval;
 
@@ -875,6 +875,13 @@ int arm7_9_assert_reset(struct target *target)
 	enum reset_types jtag_reset_config = jtag_get_reset_config();
 	bool use_event = false;
 
+	/* TODO: apply hw reset signal in not examined state */
+	if (!(target_was_examined(target))) {
+		LOG_WARNING("Reset is not asserted because the target is not examined.");
+		LOG_WARNING("Use a reset button or power cycle the target.");
+		return ERROR_TARGET_NOT_EXAMINED;
+	}
+
 	LOG_DEBUG("target->state: %s", target_state_name(target));
 
 	if (target_has_event_action(target, TARGET_EVENT_RESET_ASSERT))
@@ -1639,11 +1646,11 @@ static int arm7_9_restart_core(struct target *target)
 	if (arm7_9->need_bypass_before_restart) {
 		arm7_9->need_bypass_before_restart = 0;
 
-		retval = arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+		retval = arm_jtag_set_instr(jtag_info->tap, 0xf, NULL, TAP_IDLE);
 		if (retval != ERROR_OK)
 			return retval;
 	}
-	retval = arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+	retval = arm_jtag_set_instr(jtag_info->tap, 0x4, NULL, TAP_IDLE);
 	if (retval != ERROR_OK)
 		return retval;
 
@@ -2033,7 +2040,7 @@ static int arm7_9_read_core_reg(struct target *target, struct reg *r,
 }
 
 static int arm7_9_write_core_reg(struct target *target, struct reg *r,
-	int num, enum arm_mode mode, uint32_t value)
+	int num, enum arm_mode mode, uint8_t *value)
 {
 	uint32_t reg[16];
 	struct arm_reg *areg = r->arch_info;
@@ -2058,7 +2065,7 @@ static int arm7_9_write_core_reg(struct target *target, struct reg *r,
 
 	if ((num >= 0) && (num <= 15)) {
 		/* write a normal core register */
-		reg[num] = value;
+		reg[num] = buf_get_u32(value, 0, 32);
 
 		arm7_9->write_core_regs(target, 1 << num, reg);
 	} else {
@@ -2067,11 +2074,12 @@ static int arm7_9_write_core_reg(struct target *target, struct reg *r,
 		*/
 		int spsr = (areg->mode != ARM_MODE_ANY);
 
+		uint32_t t = buf_get_u32(value, 0, 32);
 		/* if we're writing the CPSR, mask the T bit */
 		if (!spsr)
-			value &= ~0x20;
+			t &= ~0x20;
 
-		arm7_9->write_xpsr(target, value, spsr);
+		arm7_9->write_xpsr(target, t, spsr);
 	}
 
 	r->valid = 1;