X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm7_9_common.c;h=778e606b608adfd1a57644f5802b946d6630b7ba;hb=2ee47b22c6228b80c5a8f1e74209cbf7ad53f775;hp=b742daeb3a56e238c2ee408484997a7afd2c95cc;hpb=44ef0327dd97c1893afc63cd7fd8025cb1b57827;p=openocd.git

diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index b742daeb3a..778e606b60 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -2,7 +2,7 @@
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
- *   Copyright (C) 2007-2009 Øyvind Harboe                                 *
+ *   Copyright (C) 2007-2010 Øyvind Harboe                                 *
  *   oyvind.harboe@zylin.com                                               *
  *                                                                         *
  *   Copyright (C) 2008 by Spencer Oliver                                  *
@@ -690,9 +690,13 @@ int arm7_9_execute_sys_speed(struct target *target)
 	/* set RESTART instruction */
 	if (arm7_9->need_bypass_before_restart) {
 		arm7_9->need_bypass_before_restart = 0;
-		arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+		retval = arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+		if (retval != ERROR_OK)
+			return retval;
 	}
-	arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+	retval = arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+	if (retval != ERROR_OK)
+		return retval;
 
 	long long then = timeval_ms();
 	int timeout;
@@ -738,13 +742,18 @@ static int arm7_9_execute_fast_sys_speed(struct target *target)
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
 	struct reg *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
+	int retval;
 
 	/* set RESTART instruction */
 	if (arm7_9->need_bypass_before_restart) {
 		arm7_9->need_bypass_before_restart = 0;
-		arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+		retval = arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+		if (retval != ERROR_OK)
+			return retval;
 	}
-	arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+	retval = arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+	if (retval != ERROR_OK)
+		return retval;
 
 	if (!set)
 	{
@@ -1065,24 +1074,29 @@ int arm7_9_deassert_reset(struct target *target)
 	/* deassert reset lines */
 	jtag_add_reset(0, 0);
 
+	/* In case polling is disabled, we need to examine the
+	 * target and poll here for this target to work correctly.
+	 *
+	 * Otherwise, e.g. halt will fail afterwards with bogus
+	 * error messages as halt will believe that reset is
+	 * still in effect.
+	 */
+	if ((retval = target_examine_one(target)) != ERROR_OK)
+		return retval;
+
+	if ((retval = target_poll(target)) != ERROR_OK)
+	{
+		return retval;
+	}
+
 	enum reset_types jtag_reset_config = jtag_get_reset_config();
 	if (target->reset_halt && (jtag_reset_config & RESET_SRST_PULLS_TRST) != 0)
 	{
 		LOG_WARNING("srst pulls trst - can not reset into halted mode. Issuing halt after reset.");
-		/* set up embedded ice registers again */
-		if ((retval = target_examine_one(target)) != ERROR_OK)
-			return retval;
-
-		if ((retval = target_poll(target)) != ERROR_OK)
-		{
-			return retval;
-		}
-
 		if ((retval = target_halt(target)) != ERROR_OK)
 		{
 			return retval;
 		}
-
 	}
 	return retval;
 }
@@ -1504,7 +1518,10 @@ static int arm7_9_full_context(struct target *target)
 	}
 
 	if (!is_arm_mode(armv4_5->core_mode))
+	{
+		LOG_ERROR("not a valid arm core mode - communication failure?");
 		return ERROR_FAIL;
+	}
 
 	/* iterate through processor modes (User, FIQ, IRQ, SVC, ABT, UND)
 	 * SYS shares registers with User, so we don't touch SYS
@@ -1607,7 +1624,10 @@ static int arm7_9_restore_context(struct target *target)
 		arm7_9->pre_restore_context(target);
 
 	if (!is_arm_mode(armv4_5->core_mode))
+	{
+		LOG_ERROR("not a valid arm core mode - communication failure?");
 		return ERROR_FAIL;
+	}
 
 	/* iterate through processor modes (User, FIQ, IRQ, SVC, ABT, UND)
 	 * SYS shares registers with User, so we don't touch SYS
@@ -1744,13 +1764,19 @@ static int arm7_9_restart_core(struct target *target)
 {
 	struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 	struct arm_jtag *jtag_info = &arm7_9->jtag_info;
+	int retval;
 
 	/* set RESTART instruction */
 	if (arm7_9->need_bypass_before_restart) {
 		arm7_9->need_bypass_before_restart = 0;
-		arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+
+		retval = arm_jtag_set_instr(jtag_info, 0xf, NULL, TAP_IDLE);
+		if (retval != ERROR_OK)
+			return retval;
 	}
-	arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+	retval = arm_jtag_set_instr(jtag_info, 0x4, NULL, TAP_IDLE);
+	if (retval != ERROR_OK)
+		return retval;
 
 	jtag_add_runtest(1, TAP_IDLE);
 	return jtag_execute_queue();