X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm720t.c;h=84c66b8d8a877e5540fff4a64e4d8dfd3a63cd7b;hb=48d51e1719c2b48509786bba7c84c09d329929d3;hp=48cfdf01ce1742776e07ea2ee655af9659919f47;hpb=56e01714203406b50b40dd7738983e3b019d4df2;p=openocd.git

diff --git a/src/target/arm720t.c b/src/target/arm720t.c
index 48cfdf01ce..84c66b8d8a 100644
--- a/src/target/arm720t.c
+++ b/src/target/arm720t.c
@@ -28,6 +28,7 @@
 #include <helper/time_support.h>
 #include "target_type.h"
 #include "register.h"
+#include "arm_opcodes.h"
 
 
 /*
@@ -234,14 +235,8 @@ static int arm720t_arch_state(struct target *target)
 
 	armv4_5 = &arm720t->arm7_9_common.armv4_5_common;
 
-	LOG_USER("target halted in %s state due to %s, current mode: %s\n"
-			"cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
-			"MMU: %s, Cache: %s",
-			 arm_state_strings[armv4_5->core_state],
-			 Jim_Nvp_value2name_simple(nvp_target_debug_reason, target->debug_reason)->name ,
-			 arm_mode_name(armv4_5->core_mode),
-			 buf_get_u32(armv4_5->cpsr->value, 0, 32),
-			 buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),
+	arm_arch_state(target);
+	LOG_USER("MMU: %s, Cache: %s",
 			 state[arm720t->armv4_5_mmu.mmu_enabled],
 			 state[arm720t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled]);
 
@@ -481,7 +476,10 @@ COMMAND_HANDLER(arm720t_handle_cp15_command)
 	return ERROR_OK;
 }
 
-static int arm720t_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+static int arm720t_mrc(struct target *target, int cpnum,
+		uint32_t op1, uint32_t op2,
+		uint32_t CRn, uint32_t CRm,
+		uint32_t *value)
 {
 	if (cpnum!=15)
 	{
@@ -489,11 +487,17 @@ static int arm720t_mrc(struct target *target, int cpnum, uint32_t op1, uint32_t
 		return ERROR_FAIL;
 	}
 
-	return arm720t_read_cp15(target, mrc_opcode(cpnum, op1, op2, CRn, CRm), value);
+	/* read "to" r0 */
+	return arm720t_read_cp15(target,
+			ARMV4_5_MRC(cpnum, op1, 0, CRn, CRm, op2),
+			value);
 
 }
 
-static int arm720t_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+static int arm720t_mcr(struct target *target, int cpnum,
+		uint32_t op1, uint32_t op2,
+		uint32_t CRn, uint32_t CRm,
+		uint32_t value)
 {
 	if (cpnum!=15)
 	{
@@ -501,7 +505,10 @@ static int arm720t_mcr(struct target *target, int cpnum, uint32_t op1, uint32_t
 		return ERROR_FAIL;
 	}
 
-	return arm720t_write_cp15(target, mrc_opcode(cpnum, op1, op2, CRn, CRm), value);
+	/* write "from" r0 */
+	return arm720t_write_cp15(target,
+			ARMV4_5_MCR(cpnum, op1, 0, CRn, CRm, op2),
+			value);
 }
 
 static const struct command_registration arm720t_exec_command_handlers[] = {
@@ -544,7 +551,7 @@ struct target_type arm720t_target =
 	.deassert_reset = arm7_9_deassert_reset,
 	.soft_reset_halt = arm720t_soft_reset_halt,
 
-	.get_gdb_reg_list = armv4_5_get_gdb_reg_list,
+	.get_gdb_reg_list = arm_get_gdb_reg_list,
 
 	.read_memory = arm720t_read_memory,
 	.write_memory = arm7_9_write_memory,