X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm11_dbgtap.c;h=a5dc37687c95ccbd139a74f85a5b9b89ecc1f5a9;hb=bbd84417f63837008f56e791df9005e26457ff60;hp=2b7b4e42d6a56c132113c3910938cc484e991ef7;hpb=57d7743639d5092770d79f7c4b12ae694c482750;p=openocd.git diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c index 2b7b4e42d6..a5dc37687c 100644 --- a/src/target/arm11_dbgtap.c +++ b/src/target/arm11_dbgtap.c @@ -199,11 +199,17 @@ int arm11_add_debug_SCAN_N(struct arm11_common *arm11, * NOTE: the ITRSEL instruction fakes SCREG changing; * but leaves its actual value unchanged. */ +#if 0 + // FIX!!! the optimization below is broken because we do not + // invalidate the cur_scan_chain upon a TRST/TMS. See arm_jtag.c + // for example on how to invalidate cur_scan_chain. Tested patches gladly + // accepted! if (arm11->jtag_info.cur_scan_chain == chain) { JTAG_DEBUG("SCREG <= %d SKIPPED", chain); return jtag_add_statemove((state == ARM11_TAP_DEFAULT) ? TAP_DRPAUSE : state); } +#endif JTAG_DEBUG("SCREG <= %d", chain); arm11_add_IR(arm11, ARM11_SCAN_N, ARM11_TAP_DEFAULT); @@ -482,7 +488,7 @@ int arm11_run_instr_data_to_core(struct arm11_common * arm11, uint32_t opcode, u { Data = *data; - arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(chain5_fields), chain5_fields, jtag_set_end_state(TAP_IDLE)); + arm11_add_dr_scan_vc(arm11->arm.target->tap, ARRAY_SIZE(chain5_fields), chain5_fields, TAP_IDLE); CHECK_RETVAL(jtag_execute_queue()); @@ -679,7 +685,7 @@ int arm11_run_instr_data_to_core_noack(struct arm11_common * arm11, uint32_t opc int retval = arm11_run_instr_data_to_core_noack_inner(arm11->arm.target->tap, opcode, data, count); - if (retval != ERROR_FAIL) + if (retval != ERROR_OK) return retval; arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT); @@ -898,7 +904,7 @@ int arm11_sc7_run(struct arm11_common * arm11, struct arm11_sc7_action * actions } /* Timeout here so we don't get stuck. */ - int i = 0; + int i_n = 0; while (1) { JTAG_DEBUG("SC7 <= c%-3d Data %08x %s", @@ -917,11 +923,11 @@ int arm11_sc7_run(struct arm11_common * arm11, struct arm11_sc7_action * actions long long then = 0; - if (i == 1000) + if (i_n == 1000) { then = timeval_ms(); } - if (i >= 1000) + if (i_n >= 1000) { if ((timeval_ms()-then) > 1000) { @@ -930,7 +936,7 @@ int arm11_sc7_run(struct arm11_common * arm11, struct arm11_sc7_action * actions } } - i++; + i_n++; } if (!nRW) @@ -964,7 +970,7 @@ int arm11_sc7_run(struct arm11_common * arm11, struct arm11_sc7_action * actions * \param arm11 Target state variable. * */ -void arm11_sc7_clear_vbw(struct arm11_common * arm11) +int arm11_sc7_clear_vbw(struct arm11_common * arm11) { size_t clear_bw_size = arm11->brp + 1; struct arm11_sc7_action *clear_bw = malloc(sizeof(struct arm11_sc7_action) * clear_bw_size); @@ -981,9 +987,12 @@ void arm11_sc7_clear_vbw(struct arm11_common * arm11) (pos++)->address = ARM11_SC7_VCR; - arm11_sc7_run(arm11, clear_bw, clear_bw_size); + int retval; + retval = arm11_sc7_run(arm11, clear_bw, clear_bw_size); free (clear_bw); + + return retval; } /** Write VCR register @@ -991,7 +1000,7 @@ void arm11_sc7_clear_vbw(struct arm11_common * arm11) * \param arm11 Target state variable. * \param value Value to be written */ -void arm11_sc7_set_vcr(struct arm11_common * arm11, uint32_t value) +int arm11_sc7_set_vcr(struct arm11_common * arm11, uint32_t value) { struct arm11_sc7_action set_vcr; @@ -999,7 +1008,7 @@ void arm11_sc7_set_vcr(struct arm11_common * arm11, uint32_t value) set_vcr.address = ARM11_SC7_VCR; set_vcr.value = value; - arm11_sc7_run(arm11, &set_vcr, 1); + return arm11_sc7_run(arm11, &set_vcr, 1); } @@ -1042,10 +1051,6 @@ static inline struct arm11_common *dpm_to_arm11(struct arm_dpm *dpm) static int arm11_dpm_prepare(struct arm_dpm *dpm) { - struct arm11_common *arm11 = dpm_to_arm11(dpm); - - arm11 = container_of(dpm->arm, struct arm11_common, arm); - return arm11_run_instr_data_prepare(dpm_to_arm11(dpm)); } @@ -1086,7 +1091,7 @@ static int arm11_dpm_instr_read_data_r0(struct arm_dpm *dpm, * and watchpoint operations instead of running them right away. Since we * pre-allocated our vector, we don't need to worry about space. */ -static int arm11_bpwp_enable(struct arm_dpm *dpm, unsigned index, +static int arm11_bpwp_enable(struct arm_dpm *dpm, unsigned index_t, uint32_t addr, uint32_t control) { struct arm11_common *arm11 = dpm_to_arm11(dpm); @@ -1104,15 +1109,15 @@ static int arm11_bpwp_enable(struct arm_dpm *dpm, unsigned index, action[0].value = addr; action[1].value = control; - switch (index) { + switch (index_t) { case 0 ... 15: - action[0].address = ARM11_SC7_BVR0 + index; - action[1].address = ARM11_SC7_BCR0 + index; + action[0].address = ARM11_SC7_BVR0 + index_t; + action[1].address = ARM11_SC7_BCR0 + index_t; break; case 16 ... 32: - index -= 16; - action[0].address = ARM11_SC7_WVR0 + index; - action[1].address = ARM11_SC7_WCR0 + index; + index_t -= 16; + action[0].address = ARM11_SC7_WVR0 + index_t; + action[1].address = ARM11_SC7_WCR0 + index_t; break; default: return ERROR_FAIL; @@ -1123,7 +1128,7 @@ static int arm11_bpwp_enable(struct arm_dpm *dpm, unsigned index, return ERROR_OK; } -static int arm11_bpwp_disable(struct arm_dpm *dpm, unsigned index) +static int arm11_bpwp_disable(struct arm_dpm *dpm, unsigned index_t) { struct arm11_common *arm11 = dpm_to_arm11(dpm); struct arm11_sc7_action *action; @@ -1133,13 +1138,13 @@ static int arm11_bpwp_disable(struct arm_dpm *dpm, unsigned index) action[0].write = true; action[0].value = 0; - switch (index) { + switch (index_t) { case 0 ... 15: - action[0].address = ARM11_SC7_BCR0 + index; + action[0].address = ARM11_SC7_BCR0 + index_t; break; case 16 ... 32: - index -= 16; - action[0].address = ARM11_SC7_WCR0 + index; + index_t -= 16; + action[0].address = ARM11_SC7_WCR0 + index_t; break; default: return ERROR_FAIL;