X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm11.h;h=67320de7b295cbe04502030a8dcaee6fed05adc9;hb=af66678c9a76f3bdab23beb3ffa7d7d53423bdfa;hp=d5071b20641717979d81e8c4cd4872a8baac3b8e;hpb=db7e77237c5a8104b527aeb23a2546b4bab92d8a;p=openocd.git

diff --git a/src/target/arm11.h b/src/target/arm11.h
index d5071b2064..67320de7b2 100644
--- a/src/target/arm11.h
+++ b/src/target/arm11.h
@@ -33,8 +33,9 @@
 	type * variable = calloc(1, sizeof(type) * items)
 
 /* For MinGW use 'I' prefix to print size_t (instead of 'z') */
+/* Except if __USE_MINGW_ANSI_STDIO is defined with MinGW    */
 
-#ifndef __MSVCRT__
+#if (!defined(__MSVCRT__) || defined(__USE_MINGW_ANSI_STDIO))
 #define ZU		"%zu"
 #else
 #define ZU		"%Iu"
@@ -98,10 +99,6 @@ typedef struct arm11_common_s
 	uint32_t		last_dscr;		/**< Last retrieved DSCR value;
 							     Use only for debug message generation		*/
 
-	bool	trst_active;
-	bool	halt_requested;					/**< Keep track if arm11_halt() calls occured
-												 during reset. Otherwise do it ASAP. */
-
 	bool	simulate_reset_on_next_halt;	/**< Perform cleanups of the ARM state on next halt */
 
 	/** \name Shadow registers to save processor state */
@@ -233,7 +230,6 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
 int arm11_register_commands(struct command_context_s *cmd_ctx);
 int arm11_target_create(struct target_s *target, Jim_Interp *interp);
 int arm11_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
-int arm11_quit(void);
 
 /* helpers */
 int arm11_build_reg_cache(target_t *target);
@@ -247,23 +243,23 @@ void arm11_dump_reg_changes(arm11_common_t * arm11);
 
 void arm11_setup_field			(arm11_common_t * arm11, int num_bits, void * in_data, void * out_data, scan_field_t * field);
 void arm11_add_IR				(arm11_common_t * arm11, uint8_t instr, tap_state_t state);
-void arm11_add_debug_SCAN_N		(arm11_common_t * arm11, uint8_t chain, tap_state_t state);
+int arm11_add_debug_SCAN_N		(arm11_common_t * arm11, uint8_t chain, tap_state_t state);
 void arm11_add_debug_INST		(arm11_common_t * arm11, uint32_t inst, uint8_t * flag, tap_state_t state);
 int arm11_read_DSCR				(arm11_common_t * arm11, uint32_t *dscr);
 int arm11_write_DSCR			(arm11_common_t * arm11, uint32_t dscr);
 
 enum target_debug_reason arm11_get_DSCR_debug_reason(uint32_t dscr);
 
-void arm11_run_instr_data_prepare			(arm11_common_t * arm11);
-void arm11_run_instr_data_finish			(arm11_common_t * arm11);
+int arm11_run_instr_data_prepare			(arm11_common_t * arm11);
+int arm11_run_instr_data_finish				(arm11_common_t * arm11);
 int arm11_run_instr_no_data					(arm11_common_t * arm11, uint32_t * opcode, size_t count);
-void arm11_run_instr_no_data1				(arm11_common_t * arm11, uint32_t opcode);
+int arm11_run_instr_no_data1				(arm11_common_t * arm11, uint32_t opcode);
 int arm11_run_instr_data_to_core			(arm11_common_t * arm11, uint32_t opcode, uint32_t * data, size_t count);
 int arm11_run_instr_data_to_core_noack		(arm11_common_t * arm11, uint32_t opcode, uint32_t * data, size_t count);
 int arm11_run_instr_data_to_core1			(arm11_common_t * arm11, uint32_t opcode, uint32_t data);
 int arm11_run_instr_data_from_core			(arm11_common_t * arm11, uint32_t opcode, uint32_t * data, size_t count);
-void arm11_run_instr_data_from_core_via_r0	(arm11_common_t * arm11, uint32_t opcode, uint32_t * data);
-void arm11_run_instr_data_to_core_via_r0	(arm11_common_t * arm11, uint32_t opcode, uint32_t data);
+int arm11_run_instr_data_from_core_via_r0	(arm11_common_t * arm11, uint32_t opcode, uint32_t * data);
+int arm11_run_instr_data_to_core_via_r0	(arm11_common_t * arm11, uint32_t opcode, uint32_t data);
 
 int arm11_add_dr_scan_vc(int num_fields, scan_field_t *fields, tap_state_t state);
 int arm11_add_ir_scan_vc(int num_fields, scan_field_t *fields, tap_state_t state);