X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm.h;h=d8361bd6312dfca5ddd6fb3f1704b577127fe700;hb=1eb19b8de5bf2f6699766f2178d1ef04ce4579a6;hp=ce8cbe193e8bf2bfdd3d2e259668ec1b9b5bf0ec;hpb=0f3bbcf09683904c1f21b6961cbb0f36b07043c0;p=openocd.git

diff --git a/src/target/arm.h b/src/target/arm.h
index ce8cbe193e..d8361bd631 100644
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -21,8 +21,9 @@
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the
  * Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  */
+
 #ifndef ARM_H
 #define ARM_H
 
@@ -57,14 +58,15 @@ enum arm_mode {
 	ARM_MODE_FIQ = 17,
 	ARM_MODE_IRQ = 18,
 	ARM_MODE_SVC = 19,
+	ARM_MODE_MON = 22,
 	ARM_MODE_ABT = 23,
-	ARM_MODE_MON = 26,
 	ARM_MODE_UND = 27,
+	ARM_MODE_1176_MON = 28,
 	ARM_MODE_SYS = 31,
 
-	ARM_MODE_THREAD,
-	ARM_MODE_USER_THREAD,
-	ARM_MODE_HANDLER,
+	ARM_MODE_THREAD = 0,
+	ARM_MODE_USER_THREAD = 1,
+	ARM_MODE_HANDLER = 2,
 
 	ARM_MODE_ANY = -1
 };
@@ -96,7 +98,7 @@ struct arm {
 	/** Handle to the PC; valid in all core modes. */
 	struct reg *pc;
 
-	/** Handle to the CPSR; valid in all core modes. */
+	/** Handle to the CPSR/xPSR; valid in all core modes. */
 	struct reg *cpsr;
 
 	/** Handle to the SPSR; valid only in core modes with an SPSR. */
@@ -124,6 +126,9 @@ struct arm {
 	/** Flag reporting unavailability of the BKPT instruction. */
 	bool is_armv4;
 
+	/** Flag reporting armv6m based core. */
+	bool is_armv6m;
+
 	/** Flag reporting whether semihosting is active. */
 	bool is_semihosting;
 
@@ -150,7 +155,7 @@ struct arm {
 	int (*read_core_reg)(struct target *target, struct reg *reg,
 			int num, enum arm_mode mode);
 	int (*write_core_reg)(struct target *target, struct reg *reg,
-			int num, enum arm_mode mode, uint32_t value);
+			int num, enum arm_mode mode, uint8_t *value);
 
 	/** Read coprocessor register.  */
 	int (*mrc)(struct target *target, int cpnum,
@@ -176,12 +181,14 @@ struct arm {
 /** Convert target handle to generic ARM target state handle. */
 static inline struct arm *target_to_arm(struct target *target)
 {
+	assert(target != NULL);
 	return target->arch_info;
 }
 
 static inline bool is_arm(struct arm *arm)
 {
-	return arm && arm->common_magic == ARM_COMMON_MAGIC;
+	assert(arm != NULL);
+	return arm->common_magic == ARM_COMMON_MAGIC;
 }
 
 struct arm_algorithm {
@@ -195,8 +202,8 @@ struct arm_reg {
 	int num;
 	enum arm_mode mode;
 	struct target *target;
-	struct arm *armv4_5_common;
-	uint32_t value;
+	struct arm *arm;
+	uint8_t value[4];
 };
 
 struct reg_cache *arm_build_reg_cache(struct target *target, struct arm *arm);
@@ -205,7 +212,8 @@ extern const struct command_registration arm_command_handlers[];
 
 int arm_arch_state(struct target *target);
 int arm_get_gdb_reg_list(struct target *target,
-		struct reg **reg_list[], int *reg_list_size);
+		struct reg **reg_list[], int *reg_list_size,
+		enum target_register_class reg_class);
 
 int arm_init_arch_info(struct target *target, struct arm *arm);
 
@@ -231,8 +239,6 @@ int arm_blank_check_memory(struct target *target,
 void arm_set_cpsr(struct arm *arm, uint32_t cpsr);
 struct reg *arm_reg_current(struct arm *arm, unsigned regnum);
 
-void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip);
-
 extern struct reg arm_gdb_dummy_fp_reg;
 extern struct reg arm_gdb_dummy_fps_reg;