X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Ftarget%2Farm.h;h=27636cc3df9658c0f40dd15d57dccbbf5a8782b6;hb=d84c7d91960bbba0079268d165f0bb29a0da4d86;hp=ab7d85c633775a95db8b8afddff90aa7d5a2b92c;hpb=374127301ec1d72033b9d573b72c7abdfd61990d;p=openocd.git

diff --git a/src/target/arm.h b/src/target/arm.h
index ab7d85c633..27636cc3df 100644
--- a/src/target/arm.h
+++ b/src/target/arm.h
@@ -21,7 +21,7 @@
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the
  * Free Software Foundation, Inc.,
- * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  */
 
 #ifndef ARM_H
@@ -58,14 +58,14 @@ enum arm_mode {
 	ARM_MODE_FIQ = 17,
 	ARM_MODE_IRQ = 18,
 	ARM_MODE_SVC = 19,
+	ARM_MODE_MON = 22,
 	ARM_MODE_ABT = 23,
-	ARM_MODE_MON = 26,
 	ARM_MODE_UND = 27,
 	ARM_MODE_SYS = 31,
 
-	ARM_MODE_THREAD,
-	ARM_MODE_USER_THREAD,
-	ARM_MODE_HANDLER,
+	ARM_MODE_THREAD = 0,
+	ARM_MODE_USER_THREAD = 1,
+	ARM_MODE_HANDLER = 2,
 
 	ARM_MODE_ANY = -1
 };
@@ -97,7 +97,7 @@ struct arm {
 	/** Handle to the PC; valid in all core modes. */
 	struct reg *pc;
 
-	/** Handle to the CPSR; valid in all core modes. */
+	/** Handle to the CPSR/xPSR; valid in all core modes. */
 	struct reg *cpsr;
 
 	/** Handle to the SPSR; valid only in core modes with an SPSR. */
@@ -125,6 +125,9 @@ struct arm {
 	/** Flag reporting unavailability of the BKPT instruction. */
 	bool is_armv4;
 
+	/** Flag reporting armv6m based core. */
+	bool is_armv6m;
+
 	/** Flag reporting whether semihosting is active. */
 	bool is_semihosting;
 
@@ -151,7 +154,7 @@ struct arm {
 	int (*read_core_reg)(struct target *target, struct reg *reg,
 			int num, enum arm_mode mode);
 	int (*write_core_reg)(struct target *target, struct reg *reg,
-			int num, enum arm_mode mode, uint32_t value);
+			int num, enum arm_mode mode, uint8_t *value);
 
 	/** Read coprocessor register.  */
 	int (*mrc)(struct target *target, int cpnum,
@@ -199,7 +202,7 @@ struct arm_reg {
 	enum arm_mode mode;
 	struct target *target;
 	struct arm *arm;
-	uint32_t value;
+	uint8_t value[4];
 };
 
 struct reg_cache *arm_build_reg_cache(struct target *target, struct arm *arm);
@@ -208,7 +211,8 @@ extern const struct command_registration arm_command_handlers[];
 
 int arm_arch_state(struct target *target);
 int arm_get_gdb_reg_list(struct target *target,
-		struct reg **reg_list[], int *reg_list_size);
+		struct reg **reg_list[], int *reg_list_size,
+		enum target_register_class reg_class);
 
 int arm_init_arch_info(struct target *target, struct arm *arm);
 
@@ -234,8 +238,6 @@ int arm_blank_check_memory(struct target *target,
 void arm_set_cpsr(struct arm *arm, uint32_t cpsr);
 struct reg *arm_reg_current(struct arm *arm, unsigned regnum);
 
-void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip);
-
 extern struct reg arm_gdb_dummy_fp_reg;
 extern struct reg arm_gdb_dummy_fps_reg;