X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fjtag%2Fbitbang.c;h=8fbe83deeb68aca2571fe5802ea50eddb832deea;hb=f90d8fa45f2d4c9d4b7990f198b232ee55cbb4e1;hp=9f7c14cdad8317bb0930f77c25c5474884cdcd68;hpb=a3e84343e202eb70ebce0ec1e8b15d7f9ce57f00;p=openocd.git

diff --git a/src/jtag/bitbang.c b/src/jtag/bitbang.c
index 9f7c14cdad..8fbe83deeb 100644
--- a/src/jtag/bitbang.c
+++ b/src/jtag/bitbang.c
@@ -47,7 +47,7 @@ bitbang_interface_t *bitbang_interface;
  *
  * If someone can submit a patch with an explanation it will be greatly
  * appreciated, but as far as I can tell (ØH) DCLK is generated upon
- * clk=0 in TAP_IDLE. Good luck deducing that from the ARM documentation!
+ * clk = 0 in TAP_IDLE. Good luck deducing that from the ARM documentation!
  * The ARM documentation uses the term "DCLK is asserted while in the TAP_IDLE
  * state". With hardware there is no such thing as *while* in a state. There
  * are only edges. So clk => 0 is in fact a very subtle state transition that
@@ -76,10 +76,10 @@ static void bitbang_end_state(tap_state_t state)
 
 static void bitbang_state_move(int skip)
 {
-	int i=0, tms=0;
-	u8 tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
+	int i = 0, tms = 0;
+	uint8_t tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
 	int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
-	
+
 	for (i = skip; i < tms_count; i++)
 	{
 		tms = (tms_scan >> i) & 1;
@@ -170,7 +170,7 @@ static void bitbang_stableclocks(int num_cycles)
 
 
 
-static void bitbang_scan(bool ir_scan, enum scan_type type, u8 *buffer, int scan_size)
+static void bitbang_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, int scan_size)
 {
 	tap_state_t saved_end_state = tap_get_end_state();
 	int bit_cnt;
@@ -188,24 +188,24 @@ static void bitbang_scan(bool ir_scan, enum scan_type type, u8 *buffer, int scan
 
 	for (bit_cnt = 0; bit_cnt < scan_size; bit_cnt++)
 	{
-		int val=0;
-		int tms=(bit_cnt==scan_size-1) ? 1 : 0;
+		int val = 0;
+		int tms = (bit_cnt == scan_size-1) ? 1 : 0;
 		int tdi;
-		int bytec=bit_cnt/8;
-		int bcval=1<<(bit_cnt % 8);
+		int bytec = bit_cnt/8;
+		int bcval = 1 << (bit_cnt % 8);
 
 		/* if we're just reading the scan, but don't care about the output
 		 * default to outputting 'low', this also makes valgrind traces more readable,
 		 * as it removes the dependency on an uninitialised value
 		 */
-		tdi=0;
+		tdi = 0;
 		if ((type != SCAN_IN) && (buffer[bytec] & bcval))
-			tdi=1;
+			tdi = 1;
 
 		bitbang_interface->write(0, tms, tdi);
 
-		if (type!=SCAN_OUT)
-			val=bitbang_interface->read();
+		if (type != SCAN_OUT)
+			val = bitbang_interface->read();
 
 		bitbang_interface->write(1, tms, tdi);
 
@@ -233,7 +233,7 @@ int bitbang_execute_queue(void)
 	jtag_command_t *cmd = jtag_command_queue; /* currently processed command */
 	int scan_size;
 	enum scan_type type;
-	u8 *buffer;
+	uint8_t *buffer;
 	int retval;
 
 	if (!bitbang_interface)
@@ -247,7 +247,7 @@ int bitbang_execute_queue(void)
 	 */
 	retval = ERROR_OK;
 
-	if(bitbang_interface->blink)
+	if (bitbang_interface->blink)
 		bitbang_interface->blink(1);
 
 	while (cmd)
@@ -258,7 +258,7 @@ int bitbang_execute_queue(void)
 #ifdef _DEBUG_JTAG_IO_
 				LOG_DEBUG("reset trst: %i srst %i", cmd->cmd.reset->trst, cmd->cmd.reset->srst);
 #endif
-				if ((cmd->cmd.reset->trst == 1) || (cmd->cmd.reset->srst && (jtag_reset_config & RESET_SRST_PULLS_TRST)))
+				if ((cmd->cmd.reset->trst == 1) || (cmd->cmd.reset->srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
 				{
 					tap_set_state(TAP_RESET);
 				}
@@ -318,7 +318,7 @@ int bitbang_execute_queue(void)
 		}
 		cmd = cmd->next;
 	}
-	if(bitbang_interface->blink)
+	if (bitbang_interface->blink)
 		bitbang_interface->blink(0);
 
 	return retval;