X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fstr7x.c;h=6771506a0436d9f16c3838f9b7264aabe84bfd88;hb=29000b204d039bc1123027eba755329ab36a3dde;hp=2e04f6b133fd763ac23bfa3eb53e26d726a52abb;hpb=3acb107b9ae4e3d38d3fcfd29b455ebcfb444696;p=openocd.git
diff --git a/src/flash/str7x.c b/src/flash/str7x.c
index 2e04f6b133..6771506a04 100644
--- a/src/flash/str7x.c
+++ b/src/flash/str7x.c
@@ -37,16 +37,15 @@
str7x_mem_layout_t mem_layout[] = {
{0x00000000, 0x02000, 0x01},
- {0x00002000, 0x02000, 0x01},
- {0x00004000, 0x02000, 0x01},
- {0x00006000, 0x02000, 0x01},
- {0x00008000, 0x08000, 0x01},
- {0x00010000, 0x10000, 0x01},
- {0x00020000, 0x10000, 0x01},
- {0x00030000, 0x10000, 0x01},
- {0x000C0000, 0x02000, 0x100},
- {0x000C2000, 0x02000, 0x100},
- {0,0},
+ {0x00002000, 0x02000, 0x02},
+ {0x00004000, 0x02000, 0x04},
+ {0x00006000, 0x02000, 0x08},
+ {0x00008000, 0x08000, 0x10},
+ {0x00010000, 0x10000, 0x20},
+ {0x00020000, 0x10000, 0x40},
+ {0x00030000, 0x10000, 0x80},
+ {0x000C0000, 0x02000, 0x10000},
+ {0x000C2000, 0x02000, 0x20000},
};
int str7x_register_commands(struct command_context_s *cmd_ctx);
@@ -82,8 +81,7 @@ int str7x_register_commands(struct command_context_s *cmd_ctx)
int str7x_get_flash_adr(struct flash_bank_s *bank, u32 reg)
{
- str7x_flash_bank_t *str7x_info = bank->driver_priv;
- return (str7x_info->flash_base|reg);
+ return (bank->base | reg);
}
int str7x_build_block_list(struct flash_bank_s *bank)
@@ -91,21 +89,21 @@ int str7x_build_block_list(struct flash_bank_s *bank)
str7x_flash_bank_t *str7x_info = bank->driver_priv;
int i;
- int num_sectors;
+ int num_sectors = 0, b0_sectors = 0, b1_sectors = 0;
switch (bank->size)
{
case 16 * 1024:
- num_sectors = 2;
+ b0_sectors = 2;
break;
case 64 * 1024:
- num_sectors = 5;
+ b0_sectors = 5;
break;
case 128 * 1024:
- num_sectors = 6;
+ b0_sectors = 6;
break;
case 256 * 1024:
- num_sectors = 8;
+ b0_sectors = 8;
break;
default:
ERROR("BUG: unknown bank->size encountered");
@@ -114,24 +112,45 @@ int str7x_build_block_list(struct flash_bank_s *bank)
if( str7x_info->bank1 == 1 )
{
- num_sectors += 2;
+ b1_sectors += 2;
}
+ num_sectors = b0_sectors + b1_sectors;
+
bank->num_sectors = num_sectors;
bank->sectors = malloc(sizeof(flash_sector_t) * num_sectors);
+ str7x_info->sector_bits = malloc(sizeof(u32) * num_sectors);
+ str7x_info->sector_bank = malloc(sizeof(u32) * num_sectors);
+
+ num_sectors = 0;
- for (i = 0; i < num_sectors; i++)
+ for (i = 0; i < b0_sectors; i++)
{
- bank->sectors[i].offset = mem_layout[i].sector_start;
- bank->sectors[i].size = mem_layout[i].sector_size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
+ bank->sectors[num_sectors].offset = mem_layout[i].sector_start;
+ bank->sectors[num_sectors].size = mem_layout[i].sector_size;
+ bank->sectors[num_sectors].is_erased = -1;
+ bank->sectors[num_sectors].is_protected = 1;
+ str7x_info->sector_bank[num_sectors] = 0;
+ str7x_info->sector_bits[num_sectors++] = mem_layout[i].sector_bit;
}
-
+
+ if (b1_sectors)
+ {
+ for (i = 8; i < 10; i++)
+ {
+ bank->sectors[num_sectors].offset = mem_layout[i].sector_start;
+ bank->sectors[num_sectors].size = mem_layout[i].sector_size;
+ bank->sectors[num_sectors].is_erased = -1;
+ bank->sectors[num_sectors].is_protected = 1;
+ str7x_info->sector_bank[num_sectors] = 1;
+ str7x_info->sector_bits[num_sectors++] = mem_layout[i].sector_bit;
+ }
+ }
+
return ERROR_OK;
}
-/* flash bank str7x 0 0
+/* flash bank str7x 0 0
*/
int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
{
@@ -146,61 +165,70 @@ int str7x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char
str7x_info = malloc(sizeof(str7x_flash_bank_t));
bank->driver_priv = str7x_info;
- if (strcmp(args[5], "STR71x") == 0)
+ if (strcmp(args[6], "STR71x") == 0)
{
str7x_info->bank1 = 1;
- str7x_info->flash_base = 0x40000000;
+ if (bank->base != 0x40000000)
+ {
+ WARNING("overriding flash base address for STR71x device with 0x40000000");
+ bank->base = 0x40000000;
+ }
}
- else if (strcmp(args[5], "STR73x") == 0)
+ else if (strcmp(args[6], "STR73x") == 0)
{
str7x_info->bank1 = 0;
- str7x_info->flash_base = 0x80000000;
+ if (bank->base != 0x80000000)
+ {
+ WARNING("overriding flash base address for STR73x device with 0x80000000");
+ bank->base = 0x80000000;
+ }
+ }
+ else if (strcmp(args[6], "STR75x") == 0)
+ {
+ str7x_info->bank1 = 1;
+ if (bank->base != 0x20000000)
+ {
+ WARNING("overriding flash base address for STR75x device with 0x20000000");
+ bank->base = 0x20000000;
+ }
}
else
{
- ERROR("unknown STR7x variant");
+ ERROR("unknown STR7x variant: '%s'", args[6]);
free(str7x_info);
return ERROR_FLASH_BANK_INVALID;
}
-
- str7x_info->target = get_target_by_num(strtoul(args[6], NULL, 0));
- if (!str7x_info->target)
- {
- ERROR("no target '%s' configured", args[6]);
- exit(-1);
- }
str7x_build_block_list(bank);
+ str7x_info->write_algorithm = NULL;
+
return ERROR_OK;
}
u32 str7x_status(struct flash_bank_s *bank)
{
- str7x_flash_bank_t *str7x_info = bank->driver_priv;
- target_t *target = str7x_info->target;
+ target_t *target = bank->target;
u32 retval;
- target->type->read_memory(target, str7x_get_flash_adr(bank, FLASH_CR0), 4, 1, (u8*)&retval);
+ target_read_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), &retval);
return retval;
}
u32 str7x_result(struct flash_bank_s *bank)
{
- str7x_flash_bank_t *str7x_info = bank->driver_priv;
- target_t *target = str7x_info->target;
+ target_t *target = bank->target;
u32 retval;
- target->type->read_memory(target, str7x_get_flash_adr(bank, FLASH_ER), 4, 1, (u8*)&retval);
+ target_read_u32(target, str7x_get_flash_adr(bank, FLASH_ER), &retval);
return retval;
}
int str7x_blank_check(struct flash_bank_s *bank, int first, int last)
{
- str7x_flash_bank_t *str7x_info = bank->driver_priv;
- target_t *target = str7x_info->target;
+ target_t *target = bank->target;
u8 *buffer;
int i;
int nBytes;
@@ -208,7 +236,7 @@ int str7x_blank_check(struct flash_bank_s *bank, int first, int last)
if ((first < 0) || (last > bank->num_sectors))
return ERROR_FLASH_SECTOR_INVALID;
- if (str7x_info->target->state != TARGET_HALTED)
+ if (bank->target->state != TARGET_HALTED)
{
return ERROR_TARGET_NOT_HALTED;
}
@@ -239,21 +267,21 @@ int str7x_blank_check(struct flash_bank_s *bank, int first, int last)
int str7x_protect_check(struct flash_bank_s *bank)
{
str7x_flash_bank_t *str7x_info = bank->driver_priv;
- target_t *target = str7x_info->target;
+ target_t *target = bank->target;
int i;
- int retval;
+ u32 retval;
- if (str7x_info->target->state != TARGET_HALTED)
+ if (bank->target->state != TARGET_HALTED)
{
return ERROR_TARGET_NOT_HALTED;
}
- target->type->read_memory(target, str7x_get_flash_adr(bank, FLASH_NVWPAR), 4, 1, (u8*)&retval);
+ target_read_u32(target, str7x_get_flash_adr(bank, FLASH_NVWPAR), &retval);
for (i = 0; i < bank->num_sectors; i++)
{
- if (retval & (mem_layout[i].reg_offset << i))
+ if (retval & str7x_info->sector_bits[i])
bank->sectors[i].is_protected = 0;
else
bank->sectors[i].is_protected = 1;
@@ -265,42 +293,85 @@ int str7x_protect_check(struct flash_bank_s *bank)
int str7x_erase(struct flash_bank_s *bank, int first, int last)
{
str7x_flash_bank_t *str7x_info = bank->driver_priv;
- target_t *target = str7x_info->target;
+ target_t *target = bank->target;
int i;
u32 cmd;
u32 retval;
- u32 erase_blocks;
+ u32 b0_sectors = 0, b1_sectors = 0;
- if (str7x_info->target->state != TARGET_HALTED)
+ if (bank->target->state != TARGET_HALTED)
{
return ERROR_TARGET_NOT_HALTED;
}
- erase_blocks = 0;
-
for (i = first; i <= last; i++)
- erase_blocks |= (mem_layout[i].reg_offset << i);
-
- cmd = FLASH_SER;
- target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_CR0), 4, 1, (u8*)&cmd);
-
- cmd = erase_blocks;
- target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_CR1), 4, 1, (u8*)&cmd);
-
- cmd = FLASH_SER|FLASH_WMS;
- target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_CR0), 4, 1, (u8*)&cmd);
-
- while (((retval = str7x_status(bank)) & (FLASH_BSYA1|FLASH_BSYA2))){
- usleep(1000);
+ {
+ if (str7x_info->sector_bank[i] == 0)
+ b0_sectors |= str7x_info->sector_bits[i];
+ else if (str7x_info->sector_bank[i] == 1)
+ b1_sectors |= str7x_info->sector_bits[i];
+ else
+ ERROR("BUG: str7x_info->sector_bank[i] neither 0 nor 1 (%i)", str7x_info->sector_bank[i]);
}
- retval = str7x_result(bank);
+ if (b0_sectors)
+ {
+ DEBUG("b0_sectors: 0x%x", b0_sectors);
+
+ /* clear FLASH_ER register */
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0);
+
+ cmd = FLASH_SER;
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
+
+ cmd = b0_sectors;
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd);
+
+ cmd = FLASH_SER|FLASH_WMS;
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
+
+ while (((retval = str7x_status(bank)) & (FLASH_BSYA1|FLASH_BSYA2))){
+ usleep(1000);
+ }
+
+ retval = str7x_result(bank);
+
+ if (retval)
+ {
+ ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval);
+ return ERROR_FLASH_OPERATION_FAILED;
+ }
+ }
- if (retval & FLASH_ERER)
- return ERROR_FLASH_SECTOR_NOT_ERASED;
- else if (retval & FLASH_WPF)
- return ERROR_FLASH_OPERATION_FAILED;
+ if (b1_sectors)
+ {
+ DEBUG("b1_sectors: 0x%x", b1_sectors);
+
+ /* clear FLASH_ER register */
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0);
+
+ cmd = FLASH_SER;
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
+
+ cmd = b1_sectors;
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR1), cmd);
+
+ cmd = FLASH_SER|FLASH_WMS;
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
+
+ while (((retval = str7x_status(bank)) & (FLASH_BSYA1|FLASH_BSYA2))){
+ usleep(1000);
+ }
+
+ retval = str7x_result(bank);
+
+ if (retval)
+ {
+ ERROR("error erasing flash bank, FLASH_ER: 0x%x", retval);
+ return ERROR_FLASH_OPERATION_FAILED;
+ }
+ }
for (i = first; i <= last; i++)
bank->sectors[i].is_erased = 1;
@@ -311,36 +382,39 @@ int str7x_erase(struct flash_bank_s *bank, int first, int last)
int str7x_protect(struct flash_bank_s *bank, int set, int first, int last)
{
str7x_flash_bank_t *str7x_info = bank->driver_priv;
- target_t *target = str7x_info->target;
+ target_t *target = bank->target;
int i;
u32 cmd;
u32 retval;
u32 protect_blocks;
- if (str7x_info->target->state != TARGET_HALTED)
+ if (bank->target->state != TARGET_HALTED)
{
return ERROR_TARGET_NOT_HALTED;
}
protect_blocks = 0xFFFFFFFF;
- if( set )
+ if (set)
{
for (i = first; i <= last; i++)
- protect_blocks &= ~(mem_layout[i].reg_offset << i);
+ protect_blocks &= ~(str7x_info->sector_bits[i]);
}
+
+ /* clear FLASH_ER register */
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0);
cmd = FLASH_SPR;
- target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_CR0), 4, 1, (u8*)&cmd);
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
cmd = str7x_get_flash_adr(bank, FLASH_NVWPAR);
- target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_AR), 4, 1, (u8*)&cmd);
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), cmd);
cmd = protect_blocks;
- target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0), 4, 1, (u8*)&cmd);
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_DR0), cmd);
cmd = FLASH_SPR|FLASH_WMS;
- target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_CR0), 4, 1, (u8*)&cmd);
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
while (((retval = str7x_status(bank)) & (FLASH_BSYA1|FLASH_BSYA2))){
usleep(1000);
@@ -348,6 +422,8 @@ int str7x_protect(struct flash_bank_s *bank, int set, int first, int last)
retval = str7x_result(bank);
+ DEBUG("retval: 0x%8.8x", retval);
+
if (retval & FLASH_ERER)
return ERROR_FLASH_SECTOR_NOT_ERASED;
else if (retval & FLASH_WPF)
@@ -356,51 +432,223 @@ int str7x_protect(struct flash_bank_s *bank, int set, int first, int last)
return ERROR_OK;
}
-int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+int str7x_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
{
str7x_flash_bank_t *str7x_info = bank->driver_priv;
- target_t *target = str7x_info->target;
+ target_t *target = bank->target;
+ u32 buffer_size = 8192;
+ working_area_t *source;
+ u32 address = bank->base + offset;
+ reg_param_t reg_params[5];
+ armv4_5_algorithm_t armv4_5_info;
+ int retval = ERROR_OK;
+
+ u32 str7x_flash_write_code[] = {
+ /* write: */
+ 0xe3a04201, /* mov r4, #0x10000000 */
+ 0xe5824000, /* str r4, [r2, #0x0] */
+ 0xe5821010, /* str r1, [r2, #0x10] */
+ 0xe4904004, /* ldr r4, [r0], #4 */
+ 0xe5824008, /* str r4, [r2, #0x8] */
+ 0xe4904004, /* ldr r4, [r0], #4 */
+ 0xe582400c, /* str r4, [r2, #0xc] */
+ 0xe3a04209, /* mov r4, #0x90000000 */
+ 0xe5824000, /* str r4, [r2, #0x0] */
+ /* busy: */
+ 0xe5924000, /* ldr r4, [r2, #0x0] */
+ 0xe3140016, /* tst r4, #0x16 */
+ 0x1afffffc, /* bne busy */
+ 0xe5924014, /* ldr r4, [r2, #0x14] */
+ 0xe31400ff, /* tst r4, #0xff */
+ 0x03140c01, /* tsteq r4, #0x100 */
+ 0x1a000002, /* bne exit */
+ 0xe2811008, /* add r1, r1, #0x8 */
+ 0xe2533001, /* subs r3, r3, #1 */
+ 0x1affffec, /* bne write */
+ /* exit: */
+ 0xeafffffe, /* b exit */
+ };
+
+ u8 str7x_flash_write_code_buf[80];
+ int i;
+
+ /* flash write code */
+ if (!str7x_info->write_algorithm)
+ {
+ if (target_alloc_working_area(target, 4 * 20, &str7x_info->write_algorithm) != ERROR_OK)
+ {
+ WARNING("no working area available, can't do block memory writes");
+ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+ };
+
+ /* convert flash writing code into a buffer in target endianness */
+ for (i = 0; i < 20; i++)
+ target_buffer_set_u32(target, str7x_flash_write_code_buf + i*4, str7x_flash_write_code[i]);
+
+ target_write_buffer(target, str7x_info->write_algorithm->address, 20 * 4, str7x_flash_write_code_buf);
+ }
+
+ /* memory buffer */
+ while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
+ {
+ buffer_size /= 2;
+ if (buffer_size <= 256)
+ {
+ /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
+ if (str7x_info->write_algorithm)
+ target_free_working_area(target, str7x_info->write_algorithm);
+
+ WARNING("no large enough working area available, can't do block memory writes");
+ return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+ }
+ };
+
+ armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC;
+ armv4_5_info.core_mode = ARMV4_5_MODE_SVC;
+ armv4_5_info.core_state = ARMV4_5_STATE_ARM;
+
+ init_reg_param(®_params[0], "r0", 32, PARAM_OUT);
+ init_reg_param(®_params[1], "r1", 32, PARAM_OUT);
+ init_reg_param(®_params[2], "r2", 32, PARAM_OUT);
+ init_reg_param(®_params[3], "r3", 32, PARAM_OUT);
+ init_reg_param(®_params[4], "r4", 32, PARAM_IN);
+
+ while (count > 0)
+ {
+ u32 thisrun_count = (count > (buffer_size / 8)) ? (buffer_size / 8) : count;
+
+ target_write_buffer(target, source->address, thisrun_count * 8, buffer);
+
+ buf_set_u32(reg_params[0].value, 0, 32, source->address);
+ buf_set_u32(reg_params[1].value, 0, 32, address);
+ buf_set_u32(reg_params[2].value, 0, 32, str7x_get_flash_adr(bank, FLASH_CR0));
+ buf_set_u32(reg_params[3].value, 0, 32, thisrun_count);
+
+ if ((retval = target->type->run_algorithm(target, 0, NULL, 5, reg_params, str7x_info->write_algorithm->address, str7x_info->write_algorithm->address + (19 * 4), 10000, &armv4_5_info)) != ERROR_OK)
+ {
+ ERROR("error executing str7x flash write algorithm");
+ break;
+ }
+
+ if (buf_get_u32(reg_params[4].value, 0, 32) != 0x00)
+ {
+ retval = ERROR_FLASH_OPERATION_FAILED;
+ break;
+ }
+
+ buffer += thisrun_count * 8;
+ address += thisrun_count * 8;
+ count -= thisrun_count;
+ }
+
+ target_free_working_area(target, source);
+
+ destroy_reg_param(®_params[0]);
+ destroy_reg_param(®_params[1]);
+ destroy_reg_param(®_params[2]);
+ destroy_reg_param(®_params[3]);
+ destroy_reg_param(®_params[4]);
+
+ return retval;
+}
+
+int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+{
+ target_t *target = bank->target;
u32 dwords_remaining = (count / 8);
u32 bytes_remaining = (count & 0x00000007);
u32 address = bank->base + offset;
- u32 *wordbuffer = (u32*)buffer;
u32 bytes_written = 0;
u32 cmd;
u32 retval;
+ u32 check_address = offset;
+ int i;
- if (str7x_info->target->state != TARGET_HALTED)
+ if (bank->target->state != TARGET_HALTED)
{
return ERROR_TARGET_NOT_HALTED;
}
- if (offset + count > bank->size)
- return ERROR_FLASH_DST_OUT_OF_BANK;
+ if (offset & 0x7)
+ {
+ WARNING("offset 0x%x breaks required 8-byte alignment", offset);
+ return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
+ }
+
+ for (i = 0; i < bank->num_sectors; i++)
+ {
+ u32 sec_start = bank->sectors[i].offset;
+ u32 sec_end = sec_start + bank->sectors[i].size;
+
+ /* check if destination falls within the current sector */
+ if ((check_address >= sec_start) && (check_address < sec_end))
+ {
+ /* check if destination ends in the current sector */
+ if (offset + count < sec_end)
+ check_address = offset + count;
+ else
+ check_address = sec_end;
+ }
+ }
+ if (check_address != offset + count)
+ return ERROR_FLASH_DST_OUT_OF_BANK;
+
+ /* clear FLASH_ER register */
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_ER), 0x0);
+
+ /* multiple dwords (8-byte) to be programmed? */
+ if (dwords_remaining > 0)
+ {
+ /* try using a block write */
+ if ((retval = str7x_write_block(bank, buffer, offset, dwords_remaining)) != ERROR_OK)
+ {
+ if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE)
+ {
+ /* if block write failed (no sufficient working area),
+ * we use normal (slow) single dword accesses */
+ WARNING("couldn't use block writes, falling back to single memory accesses");
+ }
+ else if (retval == ERROR_FLASH_OPERATION_FAILED)
+ {
+ /* if an error occured, we examine the reason, and quit */
+ retval = str7x_result(bank);
+
+ ERROR("flash writing failed with error code: 0x%x", retval);
+ return ERROR_FLASH_OPERATION_FAILED;
+ }
+ }
+ else
+ {
+ buffer += dwords_remaining * 8;
+ address += dwords_remaining * 8;
+ dwords_remaining = 0;
+ }
+ }
+
while (dwords_remaining > 0)
{
// command
cmd = FLASH_DWPG;
- target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_CR0), 4, 1, (u8*)&cmd);
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
// address
- cmd = address;
- target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_AR), 4, 1, (u8*)&cmd);
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), address);
- // data byte 1
- cmd = wordbuffer[bytes_written/4];
- target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0), 4, 1, (u8*)&cmd);
+ // data word 1
+ target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0), 4, 1, buffer + bytes_written);
bytes_written += 4;
- // data byte 2
- cmd = wordbuffer[bytes_written/4];
- target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1), 4, 1, (u8*)&cmd);
+ // data word 2
+ target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1), 4, 1, buffer + bytes_written);
bytes_written += 4;
/* start programming cycle */
- cmd = FLASH_DWPG|FLASH_WMS;
- target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_CR0), 4, 1, (u8*)&cmd);
+ cmd = FLASH_DWPG | FLASH_WMS;
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
- while (((retval = str7x_status(bank)) & (FLASH_BSYA1|FLASH_BSYA2))){
+ while (((retval = str7x_status(bank)) & (FLASH_BSYA1 | FLASH_BSYA2)))
+ {
usleep(1000);
}
@@ -415,25 +663,39 @@ int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
address += 8;
}
- while( bytes_remaining > 0 )
+ if (bytes_remaining)
{
+ u8 last_dword[8] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+ int i = 0;
+
+ while(bytes_remaining > 0)
+ {
+ last_dword[i++] = *(buffer + bytes_written);
+ bytes_remaining--;
+ bytes_written++;
+ }
+
// command
- cmd = FLASH_WPG;
- target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_CR0), 4, 1, (u8*)&cmd);
+ cmd = FLASH_DWPG;
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
// address
- cmd = address;
- target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_AR), 4, 1, (u8*)&cmd);
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_AR), address);
- // data byte
- cmd = buffer[bytes_written];
- target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0), 4, 1, (u8*)&cmd);
+ // data word 1
+ target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_DR0), 4, 1, last_dword);
+ bytes_written += 4;
+
+ // data word 2
+ target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_DR1), 4, 1, last_dword + 4);
+ bytes_written += 4;
/* start programming cycle */
- cmd = FLASH_WPG|FLASH_WMS;
- target->type->write_memory(target, str7x_get_flash_adr(bank, FLASH_CR0), 4, 1, (u8*)&cmd);
+ cmd = FLASH_DWPG | FLASH_WMS;
+ target_write_u32(target, str7x_get_flash_adr(bank, FLASH_CR0), cmd);
- while (((retval = str7x_status(bank)) & (FLASH_BSYA1|FLASH_BSYA2))){
+ while (((retval = str7x_status(bank)) & (FLASH_BSYA1 | FLASH_BSYA2)))
+ {
usleep(1000);
}
@@ -443,12 +705,8 @@ int str7x_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
return ERROR_FLASH_OPERATION_FAILED;
else if (retval & FLASH_WPF)
return ERROR_FLASH_OPERATION_FAILED;
-
- address++;
- bytes_remaining--;
- bytes_written++;
}
-
+
return ERROR_OK;
}