X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fstm32x.c;h=22bd4f978b5b65b4fbe2ede6d595f2ff55e5c2b5;hb=86a7d813a165fda2816b8152342219b6c4ae2fc4;hp=8a3cde4b8af39d7a092e65fafd4d85cfa2c8a59c;hpb=f876d5e9c769a288faa7fd14b7bf373363542aab;p=openocd.git diff --git a/src/flash/stm32x.c b/src/flash/stm32x.c index 8a3cde4b8a..22bd4f978b 100644 --- a/src/flash/stm32x.c +++ b/src/flash/stm32x.c @@ -33,7 +33,7 @@ static int stm32x_register_commands(struct command_context_s *cmd_ctx); static int stm32x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank); static int stm32x_erase(struct flash_bank_s *bank, int first, int last); static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int last); -static int stm32x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count); +static int stm32x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count); static int stm32x_probe(struct flash_bank_s *bank); static int stm32x_auto_probe(struct flash_bank_s *bank); //static int stm32x_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc); @@ -100,38 +100,38 @@ static int stm32x_flash_bank_command(struct command_context_s *cmd_ctx, char *cm return ERROR_OK; } -static u32 stm32x_get_flash_status(flash_bank_t *bank) +static uint32_t stm32x_get_flash_status(flash_bank_t *bank) { target_t *target = bank->target; - u32 status; + uint32_t status; target_read_u32(target, STM32_FLASH_SR, &status); return status; } -static u32 stm32x_wait_status_busy(flash_bank_t *bank, int timeout) +static uint32_t stm32x_wait_status_busy(flash_bank_t *bank, int timeout) { target_t *target = bank->target; - u32 status; + uint32_t status; /* wait for busy to clear */ while (((status = stm32x_get_flash_status(bank)) & FLASH_BSY) && (timeout-- > 0)) { - LOG_DEBUG("status: 0x%x", status); + LOG_DEBUG("status: 0x%" PRIx32 "", status); alive_sleep(1); } /* Clear but report errors */ - if (status & (FLASH_WRPRTERR|FLASH_PGERR)) + if (status & (FLASH_WRPRTERR | FLASH_PGERR)) { - target_write_u32(target, STM32_FLASH_SR, FLASH_WRPRTERR|FLASH_PGERR); + target_write_u32(target, STM32_FLASH_SR, FLASH_WRPRTERR | FLASH_PGERR); } return status; } static int stm32x_read_options(struct flash_bank_s *bank) { - u32 optiondata; + uint32_t optiondata; stm32x_flash_bank_t *stm32x_info = NULL; target_t *target = bank->target; @@ -140,7 +140,7 @@ static int stm32x_read_options(struct flash_bank_s *bank) /* read current option bytes */ target_read_u32(target, STM32_FLASH_OBR, &optiondata); - stm32x_info->option_bytes.user_options = (uint16_t)0xFFF8|((optiondata >> 2) & 0x07); + stm32x_info->option_bytes.user_options = (uint16_t)0xFFF8 | ((optiondata >> 2) & 0x07); stm32x_info->option_bytes.RDP = (optiondata & (1 << OPT_READOUT)) ? 0xFFFF : 0x5AA5; if (optiondata & (1 << OPT_READOUT)) @@ -161,7 +161,7 @@ static int stm32x_erase_options(struct flash_bank_s *bank) { stm32x_flash_bank_t *stm32x_info = NULL; target_t *target = bank->target; - u32 status; + uint32_t status; stm32x_info = bank->driver_priv; @@ -177,14 +177,14 @@ static int stm32x_erase_options(struct flash_bank_s *bank) target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2); /* erase option bytes */ - target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER|FLASH_OPTWRE); - target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER|FLASH_STRT|FLASH_OPTWRE); + target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER | FLASH_OPTWRE); + target_write_u32(target, STM32_FLASH_CR, FLASH_OPTER | FLASH_STRT | FLASH_OPTWRE); status = stm32x_wait_status_busy(bank, 10); - if( status & FLASH_WRPRTERR ) + if (status & FLASH_WRPRTERR) return ERROR_FLASH_OPERATION_FAILED; - if( status & FLASH_PGERR ) + if (status & FLASH_PGERR) return ERROR_FLASH_OPERATION_FAILED; /* clear readout protection and complementary option bytes @@ -198,7 +198,7 @@ static int stm32x_write_options(struct flash_bank_s *bank) { stm32x_flash_bank_t *stm32x_info = NULL; target_t *target = bank->target; - u32 status; + uint32_t status; stm32x_info = bank->driver_priv; @@ -211,16 +211,16 @@ static int stm32x_write_options(struct flash_bank_s *bank) target_write_u32(target, STM32_FLASH_OPTKEYR, KEY2); /* program option bytes */ - target_write_u32(target, STM32_FLASH_CR, FLASH_OPTPG|FLASH_OPTWRE); + target_write_u32(target, STM32_FLASH_CR, FLASH_OPTPG | FLASH_OPTWRE); /* write user option byte */ target_write_u16(target, STM32_OB_USER, stm32x_info->option_bytes.user_options); status = stm32x_wait_status_busy(bank, 10); - if( status & FLASH_WRPRTERR ) + if (status & FLASH_WRPRTERR) return ERROR_FLASH_OPERATION_FAILED; - if( status & FLASH_PGERR ) + if (status & FLASH_PGERR) return ERROR_FLASH_OPERATION_FAILED; /* write protection byte 1 */ @@ -228,9 +228,9 @@ static int stm32x_write_options(struct flash_bank_s *bank) status = stm32x_wait_status_busy(bank, 10); - if( status & FLASH_WRPRTERR ) + if (status & FLASH_WRPRTERR) return ERROR_FLASH_OPERATION_FAILED; - if( status & FLASH_PGERR ) + if (status & FLASH_PGERR) return ERROR_FLASH_OPERATION_FAILED; /* write protection byte 2 */ @@ -238,9 +238,9 @@ static int stm32x_write_options(struct flash_bank_s *bank) status = stm32x_wait_status_busy(bank, 10); - if( status & FLASH_WRPRTERR ) + if (status & FLASH_WRPRTERR) return ERROR_FLASH_OPERATION_FAILED; - if( status & FLASH_PGERR ) + if (status & FLASH_PGERR) return ERROR_FLASH_OPERATION_FAILED; /* write protection byte 3 */ @@ -248,9 +248,9 @@ static int stm32x_write_options(struct flash_bank_s *bank) status = stm32x_wait_status_busy(bank, 10); - if( status & FLASH_WRPRTERR ) + if (status & FLASH_WRPRTERR) return ERROR_FLASH_OPERATION_FAILED; - if( status & FLASH_PGERR ) + if (status & FLASH_PGERR) return ERROR_FLASH_OPERATION_FAILED; /* write protection byte 4 */ @@ -258,9 +258,9 @@ static int stm32x_write_options(struct flash_bank_s *bank) status = stm32x_wait_status_busy(bank, 10); - if( status & FLASH_WRPRTERR ) + if (status & FLASH_WRPRTERR) return ERROR_FLASH_OPERATION_FAILED; - if( status & FLASH_PGERR ) + if (status & FLASH_PGERR) return ERROR_FLASH_OPERATION_FAILED; /* write readout protection bit */ @@ -268,9 +268,9 @@ static int stm32x_write_options(struct flash_bank_s *bank) status = stm32x_wait_status_busy(bank, 10); - if( status & FLASH_WRPRTERR ) + if (status & FLASH_WRPRTERR) return ERROR_FLASH_OPERATION_FAILED; - if( status & FLASH_PGERR ) + if (status & FLASH_PGERR) return ERROR_FLASH_OPERATION_FAILED; target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK); @@ -283,7 +283,7 @@ static int stm32x_protect_check(struct flash_bank_s *bank) target_t *target = bank->target; stm32x_flash_bank_t *stm32x_info = bank->driver_priv; - u32 protection; + uint32_t protection; int i, s; int num_bits; int set; @@ -304,14 +304,15 @@ static int stm32x_protect_check(struct flash_bank_s *bank) if (stm32x_info->ppage_size == 2) { - /* high density flash */ + /* high density flash/connectivity line protection */ set = 1; if (protection & (1 << 31)) set = 0; - /* bit 31 controls sector 62 - 255 protection */ + /* bit 31 controls sector 62 - 255 protection for high density + * bit 31 controls sector 62 - 127 protection for connectivity line */ for (s = 62; s < bank->num_sectors; s++) { bank->sectors[s].is_protected = set; @@ -333,12 +334,12 @@ static int stm32x_protect_check(struct flash_bank_s *bank) } else { - /* medium density flash */ + /* low/medium density flash protection */ for (i = 0; i < num_bits; i++) { set = 1; - if( protection & (1 << i)) + if (protection & (1 << i)) set = 0; for (s = 0; s < stm32x_info->ppage_size; s++) @@ -353,7 +354,7 @@ static int stm32x_erase(struct flash_bank_s *bank, int first, int last) { target_t *target = bank->target; int i; - u32 status; + uint32_t status; if (bank->target->state != TARGET_HALTED) { @@ -374,13 +375,13 @@ static int stm32x_erase(struct flash_bank_s *bank, int first, int last) { target_write_u32(target, STM32_FLASH_CR, FLASH_PER); target_write_u32(target, STM32_FLASH_AR, bank->base + bank->sectors[i].offset); - target_write_u32(target, STM32_FLASH_CR, FLASH_PER|FLASH_STRT); + target_write_u32(target, STM32_FLASH_CR, FLASH_PER | FLASH_STRT); status = stm32x_wait_status_busy(bank, 10); - if( status & FLASH_WRPRTERR ) + if (status & FLASH_WRPRTERR) return ERROR_FLASH_OPERATION_FAILED; - if( status & FLASH_PGERR ) + if (status & FLASH_PGERR) return ERROR_FLASH_OPERATION_FAILED; bank->sectors[i].is_erased = 1; } @@ -397,7 +398,7 @@ static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int las uint16_t prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF}; int i, reg, bit; int status; - u32 protection; + uint32_t protection; stm32x_info = bank->driver_priv; @@ -409,7 +410,7 @@ static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int las if ((first && (first % stm32x_info->ppage_size)) || ((last + 1) && (last + 1) % stm32x_info->ppage_size)) { - LOG_WARNING("sector start/end incorrect - stm32 has %dK sector protection", stm32x_info->ppage_size); + LOG_WARNING("Error: start and end sectors must be on a %d sector boundary", stm32x_info->ppage_size); return ERROR_FLASH_SECTOR_INVALID; } @@ -445,7 +446,7 @@ static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int las reg = (i / stm32x_info->ppage_size) / 8; bit = (i / stm32x_info->ppage_size) - (reg * 8); - if( set ) + if (set) prot_reg[reg] &= ~(1 << bit); else prot_reg[reg] |= (1 << bit); @@ -459,7 +460,7 @@ static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int las reg = (i / stm32x_info->ppage_size) / 8; bit = (i / stm32x_info->ppage_size) - (reg * 8); - if( set ) + if (set) prot_reg[reg] &= ~(1 << bit); else prot_reg[reg] |= (1 << bit); @@ -477,13 +478,13 @@ static int stm32x_protect(struct flash_bank_s *bank, int set, int first, int las return stm32x_write_options(bank); } -static int stm32x_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count) +static int stm32x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count) { stm32x_flash_bank_t *stm32x_info = bank->driver_priv; target_t *target = bank->target; - u32 buffer_size = 16384; + uint32_t buffer_size = 16384; working_area_t *source; - u32 address = bank->base + offset; + uint32_t address = bank->base + offset; reg_param_t reg_params[4]; armv7m_algorithm_t armv7m_info; int retval = ERROR_OK; @@ -517,7 +518,7 @@ static int stm32x_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 of return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; }; - if ((retval=target_write_buffer(target, stm32x_info->write_algorithm->address, sizeof(stm32x_flash_write_code), stm32x_flash_write_code))!=ERROR_OK) + if ((retval = target_write_buffer(target, stm32x_info->write_algorithm->address, sizeof(stm32x_flash_write_code), stm32x_flash_write_code)) != ERROR_OK) return retval; /* memory buffer */ @@ -545,9 +546,9 @@ static int stm32x_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 of while (count > 0) { - u32 thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count; + uint32_t thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count; - if ((retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer))!=ERROR_OK) + if ((retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer)) != ERROR_OK) break; buf_set_u32(reg_params[0].value, 0, 32, source->address); @@ -596,13 +597,13 @@ static int stm32x_write_block(struct flash_bank_s *bank, uint8_t *buffer, u32 of return retval; } -static int stm32x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, u32 count) +static int stm32x_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count) { target_t *target = bank->target; - u32 words_remaining = (count / 2); - u32 bytes_remaining = (count & 0x00000001); - u32 address = bank->base + offset; - u32 bytes_written = 0; + uint32_t words_remaining = (count / 2); + uint32_t bytes_remaining = (count & 0x00000001); + uint32_t address = bank->base + offset; + uint32_t bytes_written = 0; uint8_t status; int retval; @@ -614,7 +615,7 @@ static int stm32x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, if (offset & 0x1) { - LOG_WARNING("offset 0x%x breaks required 2-byte alignment", offset); + LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset); return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } @@ -658,12 +659,12 @@ static int stm32x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, status = stm32x_wait_status_busy(bank, 5); - if( status & FLASH_WRPRTERR ) + if (status & FLASH_WRPRTERR) { LOG_ERROR("flash memory not erased before writing"); return ERROR_FLASH_OPERATION_FAILED; } - if( status & FLASH_PGERR ) + if (status & FLASH_PGERR) { LOG_ERROR("flash memory write protected"); return ERROR_FLASH_OPERATION_FAILED; @@ -684,12 +685,12 @@ static int stm32x_write(struct flash_bank_s *bank, uint8_t *buffer, u32 offset, status = stm32x_wait_status_busy(bank, 5); - if( status & FLASH_WRPRTERR ) + if (status & FLASH_WRPRTERR) { LOG_ERROR("flash memory not erased before writing"); return ERROR_FLASH_OPERATION_FAILED; } - if( status & FLASH_PGERR ) + if (status & FLASH_PGERR) { LOG_ERROR("flash memory write protected"); return ERROR_FLASH_OPERATION_FAILED; @@ -707,7 +708,7 @@ static int stm32x_probe(struct flash_bank_s *bank) stm32x_flash_bank_t *stm32x_info = bank->driver_priv; int i; uint16_t num_pages; - u32 device_id; + uint32_t device_id; int page_size; if (bank->target->state != TARGET_HALTED) @@ -720,7 +721,7 @@ static int stm32x_probe(struct flash_bank_s *bank) /* read stm32 device id register */ target_read_u32(target, 0xE0042000, &device_id); - LOG_INFO( "device id = 0x%08x", device_id ); + LOG_INFO("device id = 0x%08" PRIx32 "", device_id); /* get flash size from target */ if (target_read_u16(target, 0x1FFFF7E0, &num_pages) != ERROR_OK) @@ -740,7 +741,7 @@ static int stm32x_probe(struct flash_bank_s *bank) if (num_pages == 0xffff) { /* number of sectors incorrect on revA */ - LOG_WARNING( "STM32 flash size failed, probe inaccurate - assuming 128k flash" ); + LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 128k flash"); num_pages = 128; } } @@ -755,7 +756,7 @@ static int stm32x_probe(struct flash_bank_s *bank) if (num_pages == 0xffff) { /* number of sectors incorrect on revA */ - LOG_WARNING( "STM32 flash size failed, probe inaccurate - assuming 32k flash" ); + LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 32k flash"); num_pages = 32; } } @@ -770,32 +771,32 @@ static int stm32x_probe(struct flash_bank_s *bank) if (num_pages == 0xffff) { /* number of sectors incorrect on revZ */ - LOG_WARNING( "STM32 flash size failed, probe inaccurate - assuming 512k flash" ); + LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 512k flash"); num_pages = 512; } } else if ((device_id & 0x7ff) == 0x418) { - /* connectivity line density - we have 1k pages - * 4 pages for a protection area */ - page_size = 1024; - stm32x_info->ppage_size = 4; + /* connectivity line density - we have 2k pages + * 2 pages for a protection area */ + page_size = 2048; + stm32x_info->ppage_size = 2; /* check for early silicon */ if (num_pages == 0xffff) { /* number of sectors incorrect on revZ */ - LOG_WARNING( "STM32 flash size failed, probe inaccurate - assuming 256k flash" ); + LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 256k flash"); num_pages = 256; } } else { - LOG_WARNING( "Cannot identify target as a STM32 family." ); + LOG_WARNING("Cannot identify target as a STM32 family."); return ERROR_FLASH_OPERATION_FAILED; } - LOG_INFO( "flash size = %dkbytes", num_pages ); + LOG_INFO("flash size = %dkbytes", num_pages); /* calculate numbers of pages */ num_pages /= (page_size / 1024); @@ -836,7 +837,7 @@ static int stm32x_handle_part_id_command(struct command_context_s *cmd_ctx, char static int stm32x_info(struct flash_bank_s *bank, char *buf, int buf_size) { target_t *target = bank->target; - u32 device_id; + uint32_t device_id; int printed; /* read stm32 device id register */ @@ -848,7 +849,7 @@ static int stm32x_info(struct flash_bank_s *bank, char *buf, int buf_size) buf += printed; buf_size -= printed; - switch(device_id >> 16) + switch (device_id >> 16) { case 0x0000: snprintf(buf, buf_size, "A"); @@ -877,7 +878,7 @@ static int stm32x_info(struct flash_bank_s *bank, char *buf, int buf_size) buf += printed; buf_size -= printed; - switch(device_id >> 16) + switch (device_id >> 16) { case 0x1000: snprintf(buf, buf_size, "A"); @@ -894,7 +895,7 @@ static int stm32x_info(struct flash_bank_s *bank, char *buf, int buf_size) buf += printed; buf_size -= printed; - switch(device_id >> 16) + switch (device_id >> 16) { case 0x1000: snprintf(buf, buf_size, "A"); @@ -915,12 +916,16 @@ static int stm32x_info(struct flash_bank_s *bank, char *buf, int buf_size) buf += printed; buf_size -= printed; - switch(device_id >> 16) + switch (device_id >> 16) { case 0x1000: snprintf(buf, buf_size, "A"); break; + case 0x1001: + snprintf(buf, buf_size, "Z"); + break; + default: snprintf(buf, buf_size, "unknown"); break; @@ -1033,7 +1038,7 @@ static int stm32x_handle_unlock_command(struct command_context_s *cmd_ctx, char static int stm32x_handle_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { flash_bank_t *bank; - u32 optionbyte; + uint32_t optionbyte; target_t *target = NULL; stm32x_flash_bank_t *stm32x_info = NULL; @@ -1061,7 +1066,7 @@ static int stm32x_handle_options_read_command(struct command_context_s *cmd_ctx, } target_read_u32(target, STM32_FLASH_OBR, &optionbyte); - command_print(cmd_ctx, "Option Byte: 0x%x", optionbyte); + command_print(cmd_ctx, "Option Byte: 0x%" PRIx32 "", optionbyte); if (buf_get_u32((uint8_t*)&optionbyte, OPT_ERROR, 1)) command_print(cmd_ctx, "Option Byte Complement Error"); @@ -1098,7 +1103,7 @@ static int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx if (argc < 4) { - command_print(cmd_ctx, "stm32x options_write "); + command_print(cmd_ctx, "stm32x options_write "); return ERROR_OK; } @@ -1121,29 +1126,29 @@ static int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx if (strcmp(args[1], "SWWDG") == 0) { - optionbyte |= (1<<0); + optionbyte |= (1 << 0); } else { - optionbyte &= ~(1<<0); + optionbyte &= ~(1 << 0); } if (strcmp(args[2], "NORSTSTNDBY") == 0) { - optionbyte |= (1<<1); + optionbyte |= (1 << 1); } else { - optionbyte &= ~(1<<1); + optionbyte &= ~(1 << 1); } if (strcmp(args[3], "NORSTSTOP") == 0) { - optionbyte |= (1<<2); + optionbyte |= (1 << 2); } else { - optionbyte &= ~(1<<2); + optionbyte &= ~(1 << 2); } if (stm32x_erase_options(bank) != ERROR_OK) @@ -1168,7 +1173,7 @@ static int stm32x_handle_options_write_command(struct command_context_s *cmd_ctx static int stm32x_mass_erase(struct flash_bank_s *bank) { target_t *target = bank->target; - u32 status; + uint32_t status; if (target->state != TARGET_HALTED) { @@ -1182,19 +1187,19 @@ static int stm32x_mass_erase(struct flash_bank_s *bank) /* mass erase flash memory */ target_write_u32(target, STM32_FLASH_CR, FLASH_MER); - target_write_u32(target, STM32_FLASH_CR, FLASH_MER|FLASH_STRT); + target_write_u32(target, STM32_FLASH_CR, FLASH_MER | FLASH_STRT); status = stm32x_wait_status_busy(bank, 10); target_write_u32(target, STM32_FLASH_CR, FLASH_LOCK); - if( status & FLASH_WRPRTERR ) + if (status & FLASH_WRPRTERR) { LOG_ERROR("stm32x device protected"); return ERROR_OK; } - if( status & FLASH_PGERR ) + if (status & FLASH_PGERR) { LOG_ERROR("stm32x device programming failed"); return ERROR_OK;