X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fstellaris.h;h=949a346de47222434e43e79256bcca8c3b2c162d;hb=6a374afe71ad947970b5d5bb14fa4b4c856ebfc8;hp=c6181be0397a737c329b820f6098eda8ce12b820;hpb=310be8a838c9db6b67bc4d6d7d3c7ff41b32af4c;p=openocd.git diff --git a/src/flash/stellaris.h b/src/flash/stellaris.h index c6181be039..949a346de4 100644 --- a/src/flash/stellaris.h +++ b/src/flash/stellaris.h @@ -22,32 +22,37 @@ #include "flash.h" -typedef struct stellaris_flash_bank_s +struct stellaris_flash_bank { /* chip id register */ - u32 did0; - u32 did1; - u32 dc0; - u32 dc1; + uint32_t did0; + uint32_t did1; + uint32_t dc0; + uint32_t dc1; char * target_name; - u32 sramsiz; - u32 flshsz; + uint32_t sramsiz; + uint32_t flshsz; /* flash geometry */ - u32 num_pages; - u32 pagesize; - u32 pages_in_lockregion; + uint32_t num_pages; + uint32_t pagesize; + uint32_t pages_in_lockregion; /* nv memory bits */ - u16 num_lockbits; - u32 lockbits; + uint16_t num_lockbits; + uint32_t lockbits; /* main clock status */ - u32 rcc; + uint32_t rcc; + uint32_t rcc2; uint8_t mck_valid; - u32 mck_freq; -} stellaris_flash_bank_t; + uint8_t xtal_mask; + uint32_t iosc_freq; + uint32_t mck_freq; + const char *iosc_desc; + const char *mck_desc; +}; /* STELLARIS control registers */ #define SCB_BASE 0x400FE000 @@ -62,18 +67,19 @@ typedef struct stellaris_flash_bank_s #define RIS 0x050 #define RCC 0x060 #define PLLCFG 0x064 +#define RCC2 0x070 #define FMPRE 0x130 #define FMPPE 0x134 #define USECRL 0x140 #define FLASH_CONTROL_BASE 0x400FD000 -#define FLASH_FMA (FLASH_CONTROL_BASE|0x000) -#define FLASH_FMD (FLASH_CONTROL_BASE|0x004) -#define FLASH_FMC (FLASH_CONTROL_BASE|0x008) -#define FLASH_CRIS (FLASH_CONTROL_BASE|0x00C) -#define FLASH_CIM (FLASH_CONTROL_BASE|0x010) -#define FLASH_MISC (FLASH_CONTROL_BASE|0x014) +#define FLASH_FMA (FLASH_CONTROL_BASE | 0x000) +#define FLASH_FMD (FLASH_CONTROL_BASE | 0x004) +#define FLASH_FMC (FLASH_CONTROL_BASE | 0x008) +#define FLASH_CRIS (FLASH_CONTROL_BASE | 0x00C) +#define FLASH_CIM (FLASH_CONTROL_BASE | 0x010) +#define FLASH_MISC (FLASH_CONTROL_BASE | 0x014) #define AMISC 1 #define PMISC 2 @@ -82,11 +88,11 @@ typedef struct stellaris_flash_bank_s #define PMASK 2 /* Flash Controller Command bits */ -#define FMC_WRKEY (0xA442<<16) -#define FMC_COMT (1<<3) -#define FMC_MERASE (1<<2) -#define FMC_ERASE (1<<1) -#define FMC_WRITE (1<<0) +#define FMC_WRKEY (0xA442 << 16) +#define FMC_COMT (1 << 3) +#define FMC_MERASE (1 << 2) +#define FMC_ERASE (1 << 1) +#define FMC_WRITE (1 << 0) /* STELLARIS constants */