X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fpic32mx.c;h=3ed2bf5d968677b9998b399448d225c404498e9d;hb=8959de9f679cfd0436d731fd91b88a68b9a75fa6;hp=71d2f5482bfbcd6b1b44f8aa2c03ff18aad59baf;hpb=1840226d555b9863a2315bcc6218671fdfa2af32;p=openocd.git diff --git a/src/flash/pic32mx.c b/src/flash/pic32mx.c index 71d2f5482b..3ed2bf5d96 100644 --- a/src/flash/pic32mx.c +++ b/src/flash/pic32mx.c @@ -148,11 +148,11 @@ static uint32_t pic32mx_wait_status_busy(flash_bank_t *bank, int timeout) /* wait for busy to clear */ while (((status = pic32mx_get_flash_status(bank)) & NVMCON_NVMWR) && (timeout-- > 0)) { - LOG_DEBUG("status: 0x%x", status); + LOG_DEBUG("status: 0x%" PRIx32, status ); alive_sleep(1); } - if(timeout <= 0) - LOG_DEBUG("timeout: status: 0x%x", status); + if (timeout <= 0) + LOG_DEBUG("timeout: status: 0x%" PRIx32, status ); return status; } @@ -194,11 +194,11 @@ static int pic32mx_protect_check(struct flash_bank_s *bank) } target_read_u32(target, PIC32MX_DEVCFG0, &devcfg0); - if((devcfg0 & (1<<28)) == 0) /* code protect bit */ + if ((devcfg0 & (1 << 28)) == 0) /* code protect bit */ num_pages = 0xffff; /* All pages protected */ - else if(bank->base == PIC32MX_KSEG1_BOOT_FLASH) + else if (bank->base == PIC32MX_KSEG1_BOOT_FLASH) { - if(devcfg0 & (1<<24)) + if (devcfg0 & (1 << 24)) num_pages = 0; /* All pages unprotected */ else num_pages = 0xffff; /* All pages protected */ @@ -229,25 +229,25 @@ static int pic32mx_erase(struct flash_bank_s *bank, int first, int last) { LOG_DEBUG("Erasing entire program flash"); status = pic32mx_nvm_exec(bank, NVMCON_OP_PFM_ERASE, 50); - if( status & NVMCON_NVMERR ) + if ( status & NVMCON_NVMERR ) return ERROR_FLASH_OPERATION_FAILED; - if( status & NVMCON_LVDERR ) + if ( status & NVMCON_LVDERR ) return ERROR_FLASH_OPERATION_FAILED; return ERROR_OK; } for (i = first; i <= last; i++) { - if(bank->base >= PIC32MX_KSEG1_PGM_FLASH) + if (bank->base >= PIC32MX_KSEG1_PGM_FLASH) target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(bank->base + bank->sectors[i].offset)); else target_write_u32(target, PIC32MX_NVMADDR, KS0Virt2Phys(bank->base + bank->sectors[i].offset)); status = pic32mx_nvm_exec(bank, NVMCON_OP_PAGE_ERASE, 10); - if( status & NVMCON_NVMERR ) + if ( status & NVMCON_NVMERR ) return ERROR_FLASH_OPERATION_FAILED; - if( status & NVMCON_LVDERR ) + if ( status & NVMCON_LVDERR ) return ERROR_FLASH_OPERATION_FAILED; bank->sectors[i].is_erased = 1; } @@ -313,7 +313,7 @@ static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int la reg = (i / pic32mx_info->ppage_size) / 8; bit = (i / pic32mx_info->ppage_size) - (reg * 8); - if( set ) + if ( set ) prot_reg[reg] &= ~(1 << bit); else prot_reg[reg] |= (1 << bit); @@ -327,7 +327,7 @@ static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int la reg = (i / pic32mx_info->ppage_size) / 8; bit = (i / pic32mx_info->ppage_size) - (reg * 8); - if( set ) + if ( set ) prot_reg[reg] &= ~(1 << bit); else prot_reg[reg] |= (1 << bit); @@ -388,7 +388,7 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; }; - if ((retval=target_write_buffer(target, pic32mx_info->write_algorithm->address, sizeof(pic32mx_flash_write_code), pic32mx_flash_write_code))!=ERROR_OK) + if ((retval = target_write_buffer(target, pic32mx_info->write_algorithm->address, sizeof(pic32mx_flash_write_code), pic32mx_flash_write_code)) != ERROR_OK) return retval; #endif @@ -409,8 +409,8 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3 { uint32_t status; - if ((retval = target_write_buffer(target, source->address, buffer_size, buffer))!=ERROR_OK) { - LOG_ERROR("Failed to write row buffer (%d words) to RAM", buffer_size/4); + if ((retval = target_write_buffer(target, source->address, buffer_size, buffer)) != ERROR_OK) { + LOG_ERROR("Failed to write row buffer (%d words) to RAM", (int)(buffer_size/4)); break; } @@ -434,13 +434,13 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3 } #endif status = pic32mx_write_row(bank, address, source->address); - if( status & NVMCON_NVMERR ) { - LOG_ERROR("Flash write error NVMERR (status=0x%08x)", status); + if ( status & NVMCON_NVMERR ) { + LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status); retval = ERROR_FLASH_OPERATION_FAILED; break; } - if( status & NVMCON_LVDERR ) { - LOG_ERROR("Flash write error LVDERR (status=0x%08x)", status); + if ( status & NVMCON_LVDERR ) { + LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status); retval = ERROR_FLASH_OPERATION_FAILED; break; } @@ -452,19 +452,19 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3 target_free_working_area(target, source); - while(count > 0) + while (count > 0) { uint32_t value; memcpy(&value, buffer, sizeof(uint32_t)); uint32_t status = pic32mx_write_word(bank, address, value); - if( status & NVMCON_NVMERR ) { - LOG_ERROR("Flash write error NVMERR (status=0x%08x)", status); + if ( status & NVMCON_NVMERR ) { + LOG_ERROR("Flash write error NVMERR (status = 0x%08" PRIx32 ")", status); retval = ERROR_FLASH_OPERATION_FAILED; break; } - if( status & NVMCON_LVDERR ) { - LOG_ERROR("Flash write error LVDERR (status=0x%08x)", status); + if ( status & NVMCON_LVDERR ) { + LOG_ERROR("Flash write error LVDERR (status = 0x%08" PRIx32 ")", status); retval = ERROR_FLASH_OPERATION_FAILED; break; } @@ -481,7 +481,7 @@ static int pic32mx_write_word(struct flash_bank_s *bank, uint32_t address, uint3 { target_t *target = bank->target; - if(bank->base >= PIC32MX_KSEG1_PGM_FLASH) + if (bank->base >= PIC32MX_KSEG1_PGM_FLASH) target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(address)); else target_write_u32(target, PIC32MX_NVMADDR, KS0Virt2Phys(address)); @@ -497,13 +497,13 @@ static int pic32mx_write_row(struct flash_bank_s *bank, uint32_t address, uint32 { target_t *target = bank->target; - LOG_DEBUG("addr: 0x%08x srcaddr: 0x%08x", address, srcaddr); + LOG_DEBUG("addr: 0x%08" PRIx32 " srcaddr: 0x%08" PRIx32 "", address, srcaddr); - if(address >= PIC32MX_KSEG1_PGM_FLASH) + if (address >= PIC32MX_KSEG1_PGM_FLASH) target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(address)); else target_write_u32(target, PIC32MX_NVMADDR, KS0Virt2Phys(address)); - if(srcaddr >= PIC32MX_KSEG1_RAM) + if (srcaddr >= PIC32MX_KSEG1_RAM) target_write_u32(target, PIC32MX_NVMSRCADDR, KS1Virt2Phys(srcaddr)); else target_write_u32(target, PIC32MX_NVMSRCADDR, KS0Virt2Phys(srcaddr)); @@ -528,7 +528,7 @@ static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t of if (offset & 0x3) { - LOG_WARNING("offset 0x%x breaks required 4-byte alignment", offset); + LOG_WARNING("offset 0x%" PRIx32 "breaks required 4-byte alignment", offset); return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } @@ -564,9 +564,9 @@ static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t of memcpy(&value, buffer + bytes_written, sizeof(uint32_t)); status = pic32mx_write_word(bank, address, value); - if( status & NVMCON_NVMERR ) + if ( status & NVMCON_NVMERR ) return ERROR_FLASH_OPERATION_FAILED; - if( status & NVMCON_LVDERR ) + if ( status & NVMCON_LVDERR ) return ERROR_FLASH_OPERATION_FAILED; bytes_written += 4; @@ -580,9 +580,9 @@ static int pic32mx_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t of memcpy(&value, buffer + bytes_written, bytes_remaining); status = pic32mx_write_word(bank, address, value); - if( status & NVMCON_NVMERR ) + if ( status & NVMCON_NVMERR ) return ERROR_FLASH_OPERATION_FAILED; - if( status & NVMCON_LVDERR ) + if ( status & NVMCON_LVDERR ) return ERROR_FLASH_OPERATION_FAILED; } @@ -603,25 +603,29 @@ static int pic32mx_probe(struct flash_bank_s *bank) pic32mx_info->probed = 0; device_id = ejtag_info->idcode; - LOG_INFO( "device id = 0x%08x (manuf 0x%03x dev 0x%02x, ver 0x%03x)", device_id, (device_id>>1)&0x7ff, (device_id>>12)&0xff, (device_id>>20)&0xfff ); + LOG_INFO( "device id = 0x%08" PRIx32 " (manuf 0x%03x dev 0x%02x, ver 0x%03x)", + device_id, + (unsigned)((device_id >> 1)&0x7ff), + (unsigned)((device_id >> 12)&0xff), + (unsigned)((device_id >> 20)&0xfff) ); - if(((device_id>>1)&0x7ff) != PIC32MX_MANUF_ID) { + if (((device_id >> 1)&0x7ff) != PIC32MX_MANUF_ID) { LOG_WARNING( "Cannot identify target as a PIC32MX family." ); return ERROR_FLASH_OPERATION_FAILED; } page_size = 4096; - if(bank->base == PIC32MX_KSEG1_BOOT_FLASH || bank->base == 1) { + if (bank->base == PIC32MX_KSEG1_BOOT_FLASH || bank->base == 1) { /* 0xBFC00000: Boot flash size fixed at 12k */ num_pages = 12; } else { /* 0xBD000000: Program flash size varies with device */ - for(i=0; pic32mx_devs[i].name != NULL; i++) - if(pic32mx_devs[i].devid == ((device_id >> 12) & 0xff)) { + for (i = 0; pic32mx_devs[i].name != NULL; i++) + if (pic32mx_devs[i].devid == ((device_id >> 12) & 0xff)) { num_pages = pic32mx_devs[i].pfm_size; break; } - if(pic32mx_devs[i].name == NULL) { + if (pic32mx_devs[i].name == NULL) { LOG_WARNING( "Cannot identify target as a PIC32MX family." ); return ERROR_FLASH_OPERATION_FAILED; } @@ -647,8 +651,8 @@ static int pic32mx_probe(struct flash_bank_s *bank) /* calculate numbers of pages */ num_pages /= (page_size / 1024); - if(bank->base == 0) bank->base = PIC32MX_KSEG1_PGM_FLASH; - if(bank->base == 1) bank->base = PIC32MX_KSEG1_BOOT_FLASH; + if (bank->base == 0) bank->base = PIC32MX_KSEG1_PGM_FLASH; + if (bank->base == 1) bank->base = PIC32MX_KSEG1_BOOT_FLASH; bank->size = (num_pages * page_size); bank->num_sectors = num_pages; bank->chip_width = 4; @@ -693,22 +697,26 @@ static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size) device_id = ejtag_info->idcode; - if(((device_id>>1)&0x7ff) != PIC32MX_MANUF_ID) { - snprintf(buf, buf_size, "Cannot identify target as a PIC32MX family (manufacturer 0x%03d != 0x%03d)\n", (device_id>>1)&0x7ff, PIC32MX_MANUF_ID); + if (((device_id >> 1)&0x7ff) != PIC32MX_MANUF_ID) { + snprintf(buf, buf_size, + "Cannot identify target as a PIC32MX family (manufacturer 0x%03d != 0x%03d)\n", + (unsigned)((device_id >> 1)&0x7ff), + PIC32MX_MANUF_ID); return ERROR_FLASH_OPERATION_FAILED; } - for(i=0; pic32mx_devs[i].name != NULL; i++) - if(pic32mx_devs[i].devid == ((device_id >> 12) & 0xff)) { + for (i = 0; pic32mx_devs[i].name != NULL; i++) + if (pic32mx_devs[i].devid == ((device_id >> 12) & 0xff)) { printed = snprintf(buf, buf_size, "PIC32MX%s", pic32mx_devs[i].name); break; } - if(pic32mx_devs[i].name == NULL) { + if (pic32mx_devs[i].name == NULL) { snprintf(buf, buf_size, "Cannot identify target as a PIC32MX family\n"); return ERROR_FLASH_OPERATION_FAILED; } buf += printed; buf_size -= printed; - printed = snprintf(buf, buf_size, " Ver: 0x%03x", (device_id>>20)&0xfff); + printed = snprintf(buf, buf_size, " Ver: 0x%03x", + (unsigned)((device_id >> 20)&0xfff)); return ERROR_OK; } @@ -839,13 +847,13 @@ static int pic32mx_chip_erase(struct flash_bank_s *bank) target_write_u32(target, PIC32MX_FLASH_CR, FLASH_LOCK); - if( status & FLASH_WRPRTERR ) + if ( status & FLASH_WRPRTERR ) { LOG_ERROR("pic32mx device protected"); return ERROR_OK; } - if( status & FLASH_PGERR ) + if ( status & FLASH_PGERR ) { LOG_ERROR("pic32mx device programming failed"); return ERROR_OK; @@ -915,7 +923,7 @@ static int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, ch command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[2]); return ERROR_OK; } - if (address < bank->base || address >= (bank->base+bank->size)) + if (address < bank->base || address >= (bank->base + bank->size)) { command_print(cmd_ctx, "flash address '%s' is out of bounds", args[0]); return ERROR_OK; @@ -923,15 +931,15 @@ static int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, ch res = ERROR_OK; status = pic32mx_write_word(bank, address, value); - if( status & NVMCON_NVMERR ) + if ( status & NVMCON_NVMERR ) res = ERROR_FLASH_OPERATION_FAILED; - if( status & NVMCON_LVDERR ) + if ( status & NVMCON_LVDERR ) res = ERROR_FLASH_OPERATION_FAILED; if (res == ERROR_OK) command_print(cmd_ctx, "pic32mx pgm word complete"); else - command_print(cmd_ctx, "pic32mx pgm word failed (status=0x%x)", status); + command_print(cmd_ctx, "pic32mx pgm word failed (status = 0x%x)", status); return ERROR_OK; }