X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fxmc1xxx.c;h=757dd952f5910d863a0d716cf09c3e4072c86e60;hb=c1f4d9e6e8f9cdab122db36299e039a73151ffe4;hp=eda1823f9834fa9ea855373ecc7379c80817593e;hpb=ef14384b681af4f731f768bb866457832af6925f;p=openocd.git

diff --git a/src/flash/nor/xmc1xxx.c b/src/flash/nor/xmc1xxx.c
index eda1823f98..757dd952f5 100644
--- a/src/flash/nor/xmc1xxx.c
+++ b/src/flash/nor/xmc1xxx.c
@@ -253,7 +253,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer,
 #include "../../../contrib/loaders/flash/xmc1xxx/write.inc"
 	};
 
-	LOG_DEBUG("Infineon XMC1000 write at 0x%08" PRIx32 " (%" PRId32 " bytes)",
+	LOG_DEBUG("Infineon XMC1000 write at 0x%08" PRIx32 " (%" PRIu32 " bytes)",
 		offset, byte_count);
 
 	if (offset & (NVM_BLOCK_SIZE - 1)) {
@@ -262,7 +262,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer,
 		return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 	}
 	if (byte_count & (NVM_BLOCK_SIZE - 1)) {
-		LOG_WARNING("length %" PRId32 " is not block aligned, rounding up",
+		LOG_WARNING("length %" PRIu32 " is not block aligned, rounding up",
 			byte_count);
 	}
 
@@ -306,7 +306,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer,
 		uint32_t blocks = MIN(block_count, data_workarea->size / NVM_BLOCK_SIZE);
 		uint32_t addr = bank->base + offset;
 
-		LOG_DEBUG("copying %" PRId32 " bytes to SRAM " TARGET_ADDR_FMT,
+		LOG_DEBUG("copying %" PRIu32 " bytes to SRAM " TARGET_ADDR_FMT,
 			MIN(blocks * NVM_BLOCK_SIZE, byte_count),
 			data_workarea->address);
 
@@ -329,7 +329,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer,
 			}
 		}
 
-		LOG_DEBUG("writing 0x%08" PRIx32 "-0x%08" PRIx32 " (%" PRId32 "x)",
+		LOG_DEBUG("writing 0x%08" PRIx32 "-0x%08" PRIx32 " (%" PRIu32 "x)",
 			addr, addr + blocks * NVM_BLOCK_SIZE - 1, blocks);
 
 		retval = xmc1xxx_nvm_check_idle(target);
@@ -429,7 +429,7 @@ static int xmc1xxx_get_info_command(struct flash_bank *bank, char *buf, int buf_
 	}
 	LOG_DEBUG("ID[7] = %08" PRIX32, chipid[7]);
 
-	snprintf(buf, buf_size, "XMC%" PRIx32 "00 %X flash %uKB ROM %uKB SRAM %uKB",
+	snprintf(buf, buf_size, "XMC%" PRIx32 "00 %" PRIX32 " flash %" PRIu32 "KB ROM %" PRIu32 "KB SRAM %" PRIu32 "KB",
 			(chipid[0] >> 12) & 0xff,
 			0xAA + (chipid[7] >> 28) - 1,
 			(((chipid[6] >> 12) & 0x3f) - 1) * 4,