X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fxmc1xxx.c;h=757dd952f5910d863a0d716cf09c3e4072c86e60;hb=c1f4d9e6e8f9cdab122db36299e039a73151ffe4;hp=0a76b216d4c6e6124a50bb429ea65482c8002a79;hpb=47b8cf84202bf792cf66fbfa01169e9592236b8a;p=openocd.git diff --git a/src/flash/nor/xmc1xxx.c b/src/flash/nor/xmc1xxx.c index 0a76b216d4..757dd952f5 100644 --- a/src/flash/nor/xmc1xxx.c +++ b/src/flash/nor/xmc1xxx.c @@ -76,19 +76,20 @@ static int xmc1xxx_nvm_check_idle(struct target *target) return retval; } -static int xmc1xxx_erase(struct flash_bank *bank, int first, int last) +static int xmc1xxx_erase(struct flash_bank *bank, unsigned int first, + unsigned int last) { struct target *target = bank->target; struct working_area *workarea; struct reg_param reg_params[3]; struct armv7m_algorithm armv7m_algo; unsigned i; - int retval, sector; + int retval; const uint8_t erase_code[] = { #include "../../../contrib/loaders/flash/xmc1xxx/erase.inc" }; - LOG_DEBUG("Infineon XMC1000 erase sectors %d to %d", first, last); + LOG_DEBUG("Infineon XMC1000 erase sectors %u to %u", first, last); if (bank->target->state != TARGET_HALTED) { LOG_WARNING("Cannot communicate... target not halted."); @@ -139,7 +140,7 @@ static int xmc1xxx_erase(struct flash_bank *bank, int first, int last) goto err_run; } - for (sector = first; sector <= last; sector++) + for (unsigned int sector = first; sector <= last; sector++) bank->sectors[sector].is_erased = 1; err_run: @@ -161,7 +162,7 @@ static int xmc1xxx_erase_check(struct flash_bank *bank) struct armv7m_algorithm armv7m_algo; uint16_t val; unsigned i; - int retval, sector; + int retval; const uint8_t erase_check_code[] = { #include "../../../contrib/loaders/flash/xmc1xxx/erase_check.inc" }; @@ -192,7 +193,7 @@ static int xmc1xxx_erase_check(struct flash_bank *bank) buf_set_u32(reg_params[0].value, 0, 32, NVM_BASE); - for (sector = 0; sector < bank->num_sectors; sector++) { + for (unsigned int sector = 0; sector < bank->num_sectors; sector++) { uint32_t start = bank->base + bank->sectors[sector].offset; buf_set_u32(reg_params[1].value, 0, 32, start); buf_set_u32(reg_params[2].value, 0, 32, start + bank->sectors[sector].size); @@ -252,7 +253,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer, #include "../../../contrib/loaders/flash/xmc1xxx/write.inc" }; - LOG_DEBUG("Infineon XMC1000 write at 0x%08" PRIx32 " (%" PRId32 " bytes)", + LOG_DEBUG("Infineon XMC1000 write at 0x%08" PRIx32 " (%" PRIu32 " bytes)", offset, byte_count); if (offset & (NVM_BLOCK_SIZE - 1)) { @@ -261,7 +262,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer, return ERROR_FLASH_DST_BREAKS_ALIGNMENT; } if (byte_count & (NVM_BLOCK_SIZE - 1)) { - LOG_WARNING("length %" PRId32 " is not block aligned, rounding up", + LOG_WARNING("length %" PRIu32 " is not block aligned, rounding up", byte_count); } @@ -305,7 +306,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t blocks = MIN(block_count, data_workarea->size / NVM_BLOCK_SIZE); uint32_t addr = bank->base + offset; - LOG_DEBUG("copying %" PRId32 " bytes to SRAM 0x%08" TARGET_PRIxADDR, + LOG_DEBUG("copying %" PRIu32 " bytes to SRAM " TARGET_ADDR_FMT, MIN(blocks * NVM_BLOCK_SIZE, byte_count), data_workarea->address); @@ -328,7 +329,7 @@ static int xmc1xxx_write(struct flash_bank *bank, const uint8_t *buffer, } } - LOG_DEBUG("writing 0x%08" PRIx32 "-0x%08" PRIx32 " (%" PRId32 "x)", + LOG_DEBUG("writing 0x%08" PRIx32 "-0x%08" PRIx32 " (%" PRIu32 "x)", addr, addr + blocks * NVM_BLOCK_SIZE - 1, blocks); retval = xmc1xxx_nvm_check_idle(target); @@ -379,7 +380,8 @@ err_alloc_code: static int xmc1xxx_protect_check(struct flash_bank *bank) { uint32_t nvmconf; - int i, num_protected, retval; + unsigned int num_protected; + int retval; if (bank->target->state != TARGET_HALTED) { LOG_WARNING("Cannot communicate... target not halted."); @@ -395,7 +397,7 @@ static int xmc1xxx_protect_check(struct flash_bank *bank) num_protected = (nvmconf >> 4) & 0xff; - for (i = 0; i < bank->num_sectors; i++) + for (unsigned int i = 0; i < bank->num_sectors; i++) bank->sectors[i].is_protected = (i < num_protected) ? 1 : 0; return ERROR_OK; @@ -427,7 +429,7 @@ static int xmc1xxx_get_info_command(struct flash_bank *bank, char *buf, int buf_ } LOG_DEBUG("ID[7] = %08" PRIX32, chipid[7]); - snprintf(buf, buf_size, "XMC%" PRIx32 "00 %X flash %uKB ROM %uKB SRAM %uKB", + snprintf(buf, buf_size, "XMC%" PRIx32 "00 %" PRIX32 " flash %" PRIu32 "KB ROM %" PRIu32 "KB SRAM %" PRIu32 "KB", (chipid[0] >> 12) & 0xff, 0xAA + (chipid[7] >> 28) - 1, (((chipid[6] >> 12) & 0x3f) - 1) * 4, @@ -442,7 +444,7 @@ static int xmc1xxx_probe(struct flash_bank *bank) struct xmc1xxx_flash_bank *xmc_bank = bank->driver_priv; uint32_t flash_addr = bank->base; uint32_t idchip, flsize; - int i, retval; + int retval; if (xmc_bank->probed) return ERROR_OK; @@ -475,7 +477,7 @@ static int xmc1xxx_probe(struct flash_bank *bank) bank->size = bank->num_sectors * 4 * 1024; bank->sectors = calloc(bank->num_sectors, sizeof(struct flash_sector)); - for (i = 0; i < bank->num_sectors; i++) { + for (unsigned int i = 0; i < bank->num_sectors; i++) { if (i == 0) { bank->sectors[i].size = 0x200; bank->sectors[i].offset = 0xE00; @@ -534,7 +536,7 @@ static const struct command_registration xmc1xxx_command_handlers[] = { COMMAND_REGISTRATION_DONE }; -struct flash_driver xmc1xxx_flash = { +const struct flash_driver xmc1xxx_flash = { .name = "xmc1xxx", .commands = xmc1xxx_command_handlers, .flash_bank_command = xmc1xxx_flash_bank_command, @@ -546,4 +548,5 @@ struct flash_driver xmc1xxx_flash = { .erase = xmc1xxx_erase, .erase_check = xmc1xxx_erase_check, .write = xmc1xxx_write, + .free_driver_priv = default_flash_free_driver_priv, };