X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fcfi.c;h=8c1aacad263798e11179fb8790ccb276f731ed15;hb=ef72484b785ec7462a0415afea679d08b864c7fb;hp=cf83271def961cc9dd6e097e6198d2b210cea898;hpb=d1bc4375e99ce52b72988494f35beca364234bae;p=openocd.git diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c index cf83271def..8c1aacad26 100644 --- a/src/flash/nor/cfi.c +++ b/src/flash/nor/cfi.c @@ -3,6 +3,8 @@ * Dominic.Rath@gmx.de * * Copyright (C) 2009 Michael Schwingen * * michael@schwingen.org * + * Copyright (C) 2010 Øyvind Harboe * + * Copyright (C) 2010 by Antonio Borneo * * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * @@ -23,11 +25,12 @@ #include "config.h" #endif +#include "imp.h" #include "cfi.h" #include "non_cfi.h" -#include "armv4_5.h" +#include #include -#include "algorithm.h" +#include #define CFI_MAX_BUS_WIDTH 4 @@ -55,6 +58,7 @@ static const struct cfi_fixup cfi_0002_fixups[] = { {CFI_MFR_SST, 0x00D7, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]}, {CFI_MFR_SST, 0x2780, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]}, {CFI_MFR_ATMEL, 0x00C8, cfi_fixup_atmel_reversed_erase_regions, NULL}, + {CFI_MFR_FUJITSU, 0x22ea, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]}, {CFI_MFR_FUJITSU, 0x226b, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_5555_2AAA]}, {CFI_MFR_AMIC, 0xb31a, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]}, {CFI_MFR_MX, 0x225b, cfi_fixup_0002_unlock_addresses, &cfi_unlock_addresses[CFI_UNLOCK_555_2AA]}, @@ -102,7 +106,6 @@ static __inline__ uint32_t flash_address(struct flash_bank *bank, int sector, ui } return bank->base + bank->sectors[sector].offset + offset * bank->bus_width; } - } static void cfi_command(struct flash_bank *bank, uint8_t cmd, uint8_t *cmd_buf) @@ -131,6 +134,14 @@ static void cfi_command(struct flash_bank *bank, uint8_t cmd, uint8_t *cmd_buf) } } +static int cfi_send_command(struct flash_bank *bank, uint8_t cmd, uint32_t address) +{ + uint8_t command[CFI_MAX_BUS_WIDTH]; + + cfi_command(bank, cmd, command); + return target_write_memory(bank->target, address, bank->bus_width, 1, command); +} + /* read unsigned 8-bit value from the bank * flash banks are expected to be made of similar chips * the query result should be the same for all @@ -222,10 +233,38 @@ static uint32_t cfi_query_u32(struct flash_bank *bank, int sector, uint32_t offs data[(3 * bank->bus_width) - 1] << 16 | data[(4 * bank->bus_width) - 1] << 24; } +static int cfi_reset(struct flash_bank *bank) +{ + struct cfi_flash_bank *cfi_info = bank->driver_priv; + int retval = ERROR_OK; + + if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK) + { + return retval; + } + + if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0))) != ERROR_OK) + { + return retval; + } + + if (cfi_info->manufacturer == 0x20 && + (cfi_info->device_id == 0x227E || cfi_info->device_id == 0x7E)) + { + /* Numonix M29W128G is cmd 0xFF intolerant - causes internal undefined state + * so we send an extra 0xF0 reset to fix the bug */ + if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x00))) != ERROR_OK) + { + return retval; + } + } + + return retval; +} + static void cfi_intel_clear_status_register(struct flash_bank *bank) { struct target *target = bank->target; - uint8_t command[8]; if (target->state != TARGET_HALTED) { @@ -233,11 +272,10 @@ static void cfi_intel_clear_status_register(struct flash_bank *bank) exit(-1); } - cfi_command(bank, 0x50, command); - target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + cfi_send_command(bank, 0x50, flash_address(bank, 0, 0x0)); } -uint8_t cfi_intel_wait_status_busy(struct flash_bank *bank, int timeout) +static uint8_t cfi_intel_wait_status_busy(struct flash_bank *bank, int timeout) { uint8_t status; @@ -278,7 +316,7 @@ uint8_t cfi_intel_wait_status_busy(struct flash_bank *bank, int timeout) return status; } -int cfi_spansion_wait_status_busy(struct flash_bank *bank, int timeout) +static int cfi_spansion_wait_status_busy(struct flash_bank *bank, int timeout) { uint8_t status, oldstatus; struct cfi_flash_bank *cfi_info = bank->driver_priv; @@ -317,10 +355,17 @@ static int cfi_read_intel_pri_ext(struct flash_bank *bank) { int retval; struct cfi_flash_bank *cfi_info = bank->driver_priv; - struct cfi_intel_pri_ext *pri_ext = malloc(sizeof(struct cfi_intel_pri_ext)); - struct target *target = bank->target; - uint8_t command[8]; + struct cfi_intel_pri_ext *pri_ext; + + if (cfi_info->pri_ext) + free(cfi_info->pri_ext); + pri_ext = malloc(sizeof(struct cfi_intel_pri_ext)); + if (pri_ext == NULL) + { + LOG_ERROR("Out of memory"); + return ERROR_FAIL; + } cfi_info->pri_ext = pri_ext; pri_ext->pri[0] = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0); @@ -329,13 +374,7 @@ static int cfi_read_intel_pri_ext(struct flash_bank *bank) if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I')) { - cfi_command(bank, 0xf0, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) - { - return retval; - } - cfi_command(bank, 0xff, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_reset(bank)) != ERROR_OK) { return retval; } @@ -360,7 +399,7 @@ static int cfi_read_intel_pri_ext(struct flash_bank *bank) pri_ext->vcc_optimal = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xc); pri_ext->vpp_optimal = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xd); - LOG_DEBUG("Vcc opt: %1.1x.%1.1x, Vpp opt: %1.1x.%1.1x", + LOG_DEBUG("Vcc opt: %x.%x, Vpp opt: %u.%x", (pri_ext->vcc_optimal & 0xf0) >> 4, pri_ext->vcc_optimal & 0x0f, (pri_ext->vpp_optimal & 0xf0) >> 4, pri_ext->vpp_optimal & 0x0f); @@ -383,10 +422,17 @@ static int cfi_read_spansion_pri_ext(struct flash_bank *bank) { int retval; struct cfi_flash_bank *cfi_info = bank->driver_priv; - struct cfi_spansion_pri_ext *pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext)); - struct target *target = bank->target; - uint8_t command[8]; + struct cfi_spansion_pri_ext *pri_ext; + + if (cfi_info->pri_ext) + free(cfi_info->pri_ext); + pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext)); + if (pri_ext == NULL) + { + LOG_ERROR("Out of memory"); + return ERROR_FAIL; + } cfi_info->pri_ext = pri_ext; pri_ext->pri[0] = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0); @@ -395,8 +441,7 @@ static int cfi_read_spansion_pri_ext(struct flash_bank *bank) if ((pri_ext->pri[0] != 'P') || (pri_ext->pri[1] != 'R') || (pri_ext->pri[2] != 'I')) { - cfi_command(bank, 0xf0, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK) { return retval; } @@ -430,7 +475,7 @@ static int cfi_read_spansion_pri_ext(struct flash_bank *bank) LOG_DEBUG("Burst Mode: 0x%x, Page Mode: 0x%x, ", pri_ext->BurstMode, pri_ext->PageMode); - LOG_DEBUG("Vpp min: %2.2d.%1.1d, Vpp max: %2.2d.%1.1x", + LOG_DEBUG("Vpp min: %u.%x, Vpp max: %u.%x", (pri_ext->VppMin & 0xf0) >> 4, pri_ext->VppMin & 0x0f, (pri_ext->VppMax & 0xf0) >> 4, pri_ext->VppMax & 0x0f); @@ -449,9 +494,17 @@ static int cfi_read_atmel_pri_ext(struct flash_bank *bank) int retval; struct cfi_atmel_pri_ext atmel_pri_ext; struct cfi_flash_bank *cfi_info = bank->driver_priv; - struct cfi_spansion_pri_ext *pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext)); - struct target *target = bank->target; - uint8_t command[8]; + struct cfi_spansion_pri_ext *pri_ext; + + if (cfi_info->pri_ext) + free(cfi_info->pri_ext); + + pri_ext = malloc(sizeof(struct cfi_spansion_pri_ext)); + if (pri_ext == NULL) + { + LOG_ERROR("Out of memory"); + return ERROR_FAIL; + } /* ATMEL devices use the same CFI primary command set (0x2) as AMD/Spansion, * but a different primary extended query table. @@ -468,8 +521,7 @@ static int cfi_read_atmel_pri_ext(struct flash_bank *bank) if ((atmel_pri_ext.pri[0] != 'P') || (atmel_pri_ext.pri[1] != 'R') || (atmel_pri_ext.pri[2] != 'I')) { - cfi_command(bank, 0xf0, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK) { return retval; } @@ -553,7 +605,7 @@ static int cfi_spansion_info(struct flash_bank *bank, char *buf, int buf_size) buf += printed; buf_size -= printed; - printed = snprintf(buf, buf_size, "VppMin: %2.2d.%1.1x, VppMax: %2.2d.%1.1x\n", + printed = snprintf(buf, buf_size, "VppMin: %u.%x, VppMax: %u.%x\n", (pri_ext->VppMin & 0xf0) >> 4, pri_ext->VppMin & 0x0f, (pri_ext->VppMax & 0xf0) >> 4, pri_ext->VppMax & 0x0f); @@ -578,7 +630,7 @@ static int cfi_intel_info(struct flash_bank *bank, char *buf, int buf_size) buf += printed; buf_size -= printed; - printed = snprintf(buf, buf_size, "Vcc opt: %1.1x.%1.1x, Vpp opt: %1.1x.%1.1x\n", + printed = snprintf(buf, buf_size, "Vcc opt: %x.%x, Vpp opt: %u.%x\n", (pri_ext->vcc_optimal & 0xf0) >> 4, pri_ext->vcc_optimal & 0x0f, (pri_ext->vpp_optimal & 0xf0) >> 4, pri_ext->vpp_optimal & 0x0f); buf += printed; @@ -601,12 +653,18 @@ FLASH_BANK_COMMAND_HANDLER(cfi_flash_bank_command) return ERROR_FLASH_BANK_INVALID; } - uint16_t chip_width, bus_width; - COMMAND_PARSE_NUMBER(u16, CMD_ARGV[3], bus_width); - COMMAND_PARSE_NUMBER(u16, CMD_ARGV[4], chip_width); - - if ((chip_width > CFI_MAX_CHIP_WIDTH) - || (bus_width > CFI_MAX_BUS_WIDTH)) + /* both widths must: + * - not exceed max value; + * - not be null; + * - be equal to a power of 2. + * bus must be wide enought to hold one chip */ + if ((bank->chip_width > CFI_MAX_CHIP_WIDTH) + || (bank->bus_width > CFI_MAX_BUS_WIDTH) + || (bank->chip_width == 0) + || (bank->bus_width == 0) + || (bank->chip_width & (bank->chip_width - 1)) + || (bank->bus_width & (bank->bus_width - 1)) + || (bank->chip_width > bank->bus_width)) { LOG_ERROR("chip and bus width have to specified in bytes"); return ERROR_FLASH_BANK_INVALID; @@ -614,6 +672,8 @@ FLASH_BANK_COMMAND_HANDLER(cfi_flash_bank_command) cfi_info = malloc(sizeof(struct cfi_flash_bank)); cfi_info->probed = 0; + cfi_info->erase_region_info = 0; + cfi_info->pri_ext = NULL; bank->driver_priv = cfi_info; cfi_info->write_algorithm = NULL; @@ -646,22 +706,18 @@ static int cfi_intel_erase(struct flash_bank *bank, int first, int last) { int retval; struct cfi_flash_bank *cfi_info = bank->driver_priv; - struct target *target = bank->target; - uint8_t command[8]; int i; cfi_intel_clear_status_register(bank); for (i = first; i <= last; i++) { - cfi_command(bank, 0x20, command); - if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x20, flash_address(bank, i, 0x0))) != ERROR_OK) { return retval; } - cfi_command(bank, 0xd0, command); - if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xd0, flash_address(bank, i, 0x0))) != ERROR_OK) { return retval; } @@ -670,8 +726,7 @@ static int cfi_intel_erase(struct flash_bank *bank, int first, int last) bank->sectors[i].is_erased = 1; else { - cfi_command(bank, 0xff, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0))) != ERROR_OK) { return retval; } @@ -681,9 +736,7 @@ static int cfi_intel_erase(struct flash_bank *bank, int first, int last) } } - cfi_command(bank, 0xff, command); - return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); - + return cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0)); } static int cfi_spansion_erase(struct flash_bank *bank, int first, int last) @@ -691,44 +744,36 @@ static int cfi_spansion_erase(struct flash_bank *bank, int first, int last) int retval; struct cfi_flash_bank *cfi_info = bank->driver_priv; struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; - struct target *target = bank->target; - uint8_t command[8]; int i; for (i = first; i <= last; i++) { - cfi_command(bank, 0xaa, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xaa, flash_address(bank, 0, pri_ext->_unlock1))) != ERROR_OK) { return retval; } - cfi_command(bank, 0x55, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x55, flash_address(bank, 0, pri_ext->_unlock2))) != ERROR_OK) { return retval; } - cfi_command(bank, 0x80, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x80, flash_address(bank, 0, pri_ext->_unlock1))) != ERROR_OK) { return retval; } - cfi_command(bank, 0xaa, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xaa, flash_address(bank, 0, pri_ext->_unlock1))) != ERROR_OK) { return retval; } - cfi_command(bank, 0x55, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x55, flash_address(bank, 0, pri_ext->_unlock2))) != ERROR_OK) { return retval; } - cfi_command(bank, 0x30, command); - if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x30, flash_address(bank, i, 0x0))) != ERROR_OK) { return retval; } @@ -737,8 +782,7 @@ static int cfi_spansion_erase(struct flash_bank *bank, int first, int last) bank->sectors[i].is_erased = 1; else { - cfi_command(bank, 0xf0, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK) { return retval; } @@ -748,8 +792,7 @@ static int cfi_spansion_erase(struct flash_bank *bank, int first, int last) } } - cfi_command(bank, 0xf0, command); - return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + return cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0)); } static int cfi_erase(struct flash_bank *bank, int first, int last) @@ -792,8 +835,6 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la int retval; struct cfi_flash_bank *cfi_info = bank->driver_priv; struct cfi_intel_pri_ext *pri_ext = cfi_info->pri_ext; - struct target *target = bank->target; - uint8_t command[8]; int retry = 0; int i; @@ -807,17 +848,13 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la for (i = first; i <= last; i++) { - cfi_command(bank, 0x60, command); - LOG_DEBUG("address: 0x%4.4" PRIx32 ", command: 0x%4.4" PRIx32, flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); - if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x60, flash_address(bank, i, 0x0))) != ERROR_OK) { return retval; } if (set) { - cfi_command(bank, 0x01, command); - LOG_DEBUG("address: 0x%4.4" PRIx32 ", command: 0x%4.4" PRIx32 , flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); - if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x01, flash_address(bank, i, 0x0))) != ERROR_OK) { return retval; } @@ -825,9 +862,7 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la } else { - cfi_command(bank, 0xd0, command); - LOG_DEBUG("address: 0x%4.4" PRIx32 ", command: 0x%4.4" PRIx32, flash_address(bank, i, 0x0), target_buffer_get_u32(target, command)); - if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xd0, flash_address(bank, i, 0x0))) != ERROR_OK) { return retval; } @@ -844,8 +879,7 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la { uint8_t block_status; /* read block lock bit, to verify status */ - cfi_command(bank, 0x90, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x90, flash_address(bank, 0, 0x55))) != ERROR_OK) { return retval; } @@ -854,8 +888,7 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la if ((block_status & 0x1) != set) { LOG_ERROR("couldn't change block lock status (set = %i, block_status = 0x%2.2x)", set, block_status); - cfi_command(bank, 0x70, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x70, flash_address(bank, 0, 0x55))) != ERROR_OK) { return retval; } @@ -877,20 +910,29 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la */ if ((!set) && (!(pri_ext->feature_support & 0x20))) { + /* FIX!!! this code path is broken!!! + * + * The correct approach is: + * + * 1. read out current protection status + * + * 2. override read out protection status w/unprotected. + * + * 3. re-protect what should be protected. + * + */ for (i = 0; i < bank->num_sectors; i++) { if (bank->sectors[i].is_protected == 1) { cfi_intel_clear_status_register(bank); - cfi_command(bank, 0x60, command); - if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x60, flash_address(bank, i, 0x0))) != ERROR_OK) { return retval; } - cfi_command(bank, 0x01, command); - if ((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x01, flash_address(bank, i, 0x0))) != ERROR_OK) { return retval; } @@ -900,8 +942,7 @@ static int cfi_intel_protect(struct flash_bank *bank, int set, int first, int la } } - cfi_command(bank, 0xff, command); - return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + return cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0)); } static int cfi_protect(struct flash_bank *bank, int set, int first, int last) @@ -916,6 +957,7 @@ static int cfi_protect(struct flash_bank *bank, int set, int first, int last) if ((first < 0) || (last < first) || (last >= bank->num_sectors)) { + LOG_ERROR("Invalid sector range"); return ERROR_FLASH_SECTOR_INVALID; } @@ -926,48 +968,12 @@ static int cfi_protect(struct flash_bank *bank, int set, int first, int last) { case 1: case 3: - cfi_intel_protect(bank, set, first, last); + return cfi_intel_protect(bank, set, first, last); break; default: LOG_ERROR("protect: cfi primary command set %i unsupported", cfi_info->pri_id); - break; - } - - return ERROR_OK; -} - -/* FIXME Replace this by a simple memcpy() - still unsure about sideeffects */ -static void cfi_add_byte(struct flash_bank *bank, uint8_t *word, uint8_t byte) -{ - /* struct target *target = bank->target; */ - - int i; - - /* NOTE: - * The data to flash must not be changed in endian! We write a bytestrem in - * target byte order already. Only the control and status byte lane of the flash - * WSM is interpreted by the CPU in different ways, when read a uint16_t or uint32_t - * word (data seems to be in the upper or lower byte lane for uint16_t accesses). - */ - -#if 0 - if (target->endianness == TARGET_LITTLE_ENDIAN) - { -#endif - /* shift bytes */ - for (i = 0; i < bank->bus_width - 1; i++) - word[i] = word[i + 1]; - word[bank->bus_width - 1] = byte; -#if 0 + return ERROR_FAIL; } - else - { - /* shift bytes */ - for (i = bank->bus_width - 1; i > 0; i--) - word[i] = word[i - 1]; - word[0] = byte; - } -#endif } /* Convert code image to target endian */ @@ -1011,7 +1017,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, uint3 struct cfi_flash_bank *cfi_info = bank->driver_priv; struct target *target = bank->target; struct reg_param reg_params[7]; - struct armv4_5_algorithm armv4_5_info; + struct arm_algorithm armv4_5_info; struct working_area *source; uint32_t buffer_size = 32768; uint32_t write_command_val, busy_pattern_val, error_pattern_val; @@ -1084,9 +1090,9 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, uint3 cfi_intel_clear_status_register(bank); - armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; - armv4_5_info.core_mode = ARMV4_5_MODE_SVC; - armv4_5_info.core_state = ARMV4_5_STATE_ARM; + armv4_5_info.common_magic = ARM_COMMON_MAGIC; + armv4_5_info.core_mode = ARM_MODE_SVC; + armv4_5_info.core_state = ARM_STATE_ARM; /* If we are setting up the write_algorith, we need target_code_src */ /* if not we only need target_code_size. */ @@ -1145,7 +1151,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, uint3 /* Get a workspace buffer for the data to flash starting with 32k size. Half size until buffer would be smaller 256 Bytem then fail back */ /* FIXME Why 256 bytes, why not 32 bytes (smallest flash write page */ - while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) + while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) { buffer_size /= 2; if (buffer_size <= 256) @@ -1170,7 +1176,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, uint3 busy_pattern_val = cfi_command_val(bank, 0x80); error_pattern_val = cfi_command_val(bank, 0x7e); - LOG_INFO("Using target buffer at 0x%08" PRIx32 " and of size 0x%04" PRIx32, source->address, buffer_size); + LOG_DEBUG("Using target buffer at 0x%08" PRIx32 " and of size 0x%04" PRIx32, source->address, buffer_size); /* Programming main loop */ while (count > 0) @@ -1191,7 +1197,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, uint3 buf_set_u32(reg_params[5].value, 0, 32, busy_pattern_val); buf_set_u32(reg_params[6].value, 0, 32, error_pattern_val); - LOG_INFO("Write 0x%04" PRIx32 " bytes to flash at 0x%08" PRIx32 , thisrun_count, address); + LOG_DEBUG("Write 0x%04" PRIx32 " bytes to flash at 0x%08" PRIx32 , thisrun_count, address); /* Execute algorithm, assume breakpoint for last instruction */ retval = target_run_algorithm(target, 0, NULL, 7, reg_params, @@ -1256,7 +1262,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, ui struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; struct target *target = bank->target; struct reg_param reg_params[10]; - struct armv4_5_algorithm armv4_5_info; + struct arm_algorithm armv4_5_info; struct working_area *source; uint32_t buffer_size = 32768; uint32_t status; @@ -1407,9 +1413,9 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, ui 0xeafffffe /* b 8204 */ }; - armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; - armv4_5_info.core_mode = ARMV4_5_MODE_SVC; - armv4_5_info.core_state = ARMV4_5_STATE_ARM; + armv4_5_info.common_magic = ARM_COMMON_MAGIC; + armv4_5_info.core_mode = ARM_MODE_SVC; + armv4_5_info.core_state = ARM_STATE_ARM; int target_code_size; const uint32_t *target_code_src; @@ -1450,6 +1456,11 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, ui /* convert bus-width dependent algorithm code to correct endiannes */ target_code = malloc(target_code_size); + if (target_code == NULL) + { + LOG_ERROR("Out of memory"); + return ERROR_FAIL; + } cfi_fix_code_endian(target, target_code, target_code_src, target_code_size / 4); /* allocate working area */ @@ -1473,7 +1484,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, ui } /* the following code still assumes target code is fixed 24*4 bytes */ - while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) + while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) { buffer_size /= 2; if (buffer_size <= 256) @@ -1554,11 +1565,9 @@ static int cfi_intel_write_word(struct flash_bank *bank, uint8_t *word, uint32_t int retval; struct cfi_flash_bank *cfi_info = bank->driver_priv; struct target *target = bank->target; - uint8_t command[8]; cfi_intel_clear_status_register(bank); - cfi_command(bank, 0x40, command); - if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x40, address)) != ERROR_OK) { return retval; } @@ -1570,8 +1579,7 @@ static int cfi_intel_write_word(struct flash_bank *bank, uint8_t *word, uint32_t if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != 0x80) { - cfi_command(bank, 0xff, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0))) != ERROR_OK) { return retval; } @@ -1588,12 +1596,13 @@ static int cfi_intel_write_words(struct flash_bank *bank, uint8_t *word, uint32_ int retval; struct cfi_flash_bank *cfi_info = bank->driver_priv; struct target *target = bank->target; - uint8_t command[8]; /* Calculate buffer size and boundary mask */ + /* buffersize is (buffer size per chip) * (number of chips) */ + /* bufferwsize is buffersize in words */ uint32_t buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); uint32_t buffermask = buffersize-1; - uint32_t bufferwsize; + uint32_t bufferwsize = buffersize / bank->bus_width; /* Check for valid range */ if (address & buffermask) @@ -1602,18 +1611,6 @@ static int cfi_intel_write_words(struct flash_bank *bank, uint8_t *word, uint32_ bank->base, address, cfi_info->max_buf_write_size); return ERROR_FLASH_OPERATION_FAILED; } - switch (bank->chip_width) - { - case 4 : bufferwsize = buffersize / 4; break; - case 2 : bufferwsize = buffersize / 2; break; - case 1 : bufferwsize = buffersize; break; - default: - LOG_ERROR("Unsupported chip width %d", bank->chip_width); - return ERROR_FLASH_OPERATION_FAILED; - } - - bufferwsize/=(bank->bus_width / bank->chip_width); - /* Check for valid size */ if (wordcount > bufferwsize) @@ -1626,15 +1623,13 @@ static int cfi_intel_write_words(struct flash_bank *bank, uint8_t *word, uint32_ cfi_intel_clear_status_register(bank); /* Initiate buffer operation _*/ - cfi_command(bank, 0xE8, command); - if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xe8, address)) != ERROR_OK) { return retval; } if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80) { - cfi_command(bank, 0xff, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0))) != ERROR_OK) { return retval; } @@ -1644,8 +1639,7 @@ static int cfi_intel_write_words(struct flash_bank *bank, uint8_t *word, uint32_ } /* Write buffer wordcount-1 and data words */ - cfi_command(bank, bufferwsize-1, command); - if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, bufferwsize-1, address)) != ERROR_OK) { return retval; } @@ -1656,15 +1650,13 @@ static int cfi_intel_write_words(struct flash_bank *bank, uint8_t *word, uint32_ } /* Commit write operation */ - cfi_command(bank, 0xd0, command); - if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xd0, address)) != ERROR_OK) { return retval; } if (cfi_intel_wait_status_busy(bank, 1000 * (1 << cfi_info->buf_write_timeout_max)) != 0x80) { - cfi_command(bank, 0xff, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0))) != ERROR_OK) { return retval; } @@ -1682,22 +1674,18 @@ static int cfi_spansion_write_word(struct flash_bank *bank, uint8_t *word, uint3 struct cfi_flash_bank *cfi_info = bank->driver_priv; struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; struct target *target = bank->target; - uint8_t command[8]; - cfi_command(bank, 0xaa, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xaa, flash_address(bank, 0, pri_ext->_unlock1))) != ERROR_OK) { return retval; } - cfi_command(bank, 0x55, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x55, flash_address(bank, 0, pri_ext->_unlock2))) != ERROR_OK) { return retval; } - cfi_command(bank, 0xa0, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xa0, flash_address(bank, 0, pri_ext->_unlock1))) != ERROR_OK) { return retval; } @@ -1709,8 +1697,7 @@ static int cfi_spansion_write_word(struct flash_bank *bank, uint8_t *word, uint3 if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != ERROR_OK) { - cfi_command(bank, 0xf0, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK) { return retval; } @@ -1727,13 +1714,14 @@ static int cfi_spansion_write_words(struct flash_bank *bank, uint8_t *word, uint int retval; struct cfi_flash_bank *cfi_info = bank->driver_priv; struct target *target = bank->target; - uint8_t command[8]; struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; /* Calculate buffer size and boundary mask */ + /* buffersize is (buffer size per chip) * (number of chips) */ + /* bufferwsize is buffersize in words */ uint32_t buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); uint32_t buffermask = buffersize-1; - uint32_t bufferwsize; + uint32_t bufferwsize = buffersize / bank->bus_width; /* Check for valid range */ if (address & buffermask) @@ -1741,17 +1729,6 @@ static int cfi_spansion_write_words(struct flash_bank *bank, uint8_t *word, uint LOG_ERROR("Write address at base 0x%" PRIx32 ", address %" PRIx32 " not aligned to 2^%d boundary", bank->base, address, cfi_info->max_buf_write_size); return ERROR_FLASH_OPERATION_FAILED; } - switch (bank->chip_width) - { - case 4 : bufferwsize = buffersize / 4; break; - case 2 : bufferwsize = buffersize / 2; break; - case 1 : bufferwsize = buffersize; break; - default: - LOG_ERROR("Unsupported chip width %d", bank->chip_width); - return ERROR_FLASH_OPERATION_FAILED; - } - - bufferwsize/=(bank->bus_width / bank->chip_width); /* Check for valid size */ if (wordcount > bufferwsize) @@ -1761,28 +1738,24 @@ static int cfi_spansion_write_words(struct flash_bank *bank, uint8_t *word, uint } // Unlock - cfi_command(bank, 0xaa, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xaa, flash_address(bank, 0, pri_ext->_unlock1))) != ERROR_OK) { return retval; } - cfi_command(bank, 0x55, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x55, flash_address(bank, 0, pri_ext->_unlock2))) != ERROR_OK) { return retval; } // Buffer load command - cfi_command(bank, 0x25, command); - if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x25, address)) != ERROR_OK) { return retval; } /* Write buffer wordcount-1 and data words */ - cfi_command(bank, bufferwsize-1, command); - if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, bufferwsize-1, address)) != ERROR_OK) { return retval; } @@ -1793,16 +1766,14 @@ static int cfi_spansion_write_words(struct flash_bank *bank, uint8_t *word, uint } /* Commit write operation */ - cfi_command(bank, 0x29, command); - if ((retval = target_write_memory(target, address, bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x29, address)) != ERROR_OK) { return retval; } if (cfi_spansion_wait_status_busy(bank, 1000 * (1 << cfi_info->word_write_timeout_max)) != ERROR_OK) { - cfi_command(bank, 0xf0, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0))) != ERROR_OK) { return retval; } @@ -1856,12 +1827,82 @@ static int cfi_write_words(struct flash_bank *bank, uint8_t *word, uint32_t word return ERROR_FLASH_OPERATION_FAILED; } -int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count) +static int cfi_read(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count) +{ + struct cfi_flash_bank *cfi_info = bank->driver_priv; + struct target *target = bank->target; + uint32_t address = bank->base + offset; + uint32_t read_p; + int align; /* number of unaligned bytes */ + uint8_t current_word[CFI_MAX_BUS_WIDTH]; + int i; + int retval; + + LOG_DEBUG("reading buffer of %i byte at 0x%8.8x", + (int)count, (unsigned)offset); + + if (bank->target->state != TARGET_HALTED) + { + LOG_ERROR("Target not halted"); + return ERROR_TARGET_NOT_HALTED; + } + + if (offset + count > bank->size) + return ERROR_FLASH_DST_OUT_OF_BANK; + + if (cfi_info->qry[0] != 'Q') + return ERROR_FLASH_BANK_NOT_PROBED; + + /* start at the first byte of the first word (bus_width size) */ + read_p = address & ~(bank->bus_width - 1); + if ((align = address - read_p) != 0) + { + LOG_INFO("Fixup %d unaligned read head bytes", align); + + /* read a complete word from flash */ + if ((retval = target_read_memory(target, read_p, bank->bus_width, 1, current_word)) != ERROR_OK) + return retval; + + /* take only bytes we need */ + for (i = align; (i < bank->bus_width) && (count > 0); i++, count--) + *buffer++ = current_word[i]; + + read_p += bank->bus_width; + } + + align = count / bank->bus_width; + if (align) + { + if ((retval = target_read_memory(target, read_p, bank->bus_width, align, buffer)) != ERROR_OK) + return retval; + + read_p += align * bank->bus_width; + buffer += align * bank->bus_width; + count -= align * bank->bus_width; + } + + if (count) + { + LOG_INFO("Fixup %d unaligned read tail bytes", count); + + /* read a complete word from flash */ + if ((retval = target_read_memory(target, read_p, bank->bus_width, 1, current_word)) != ERROR_OK) + return retval; + + /* take only bytes we need */ + for (i = 0; (i < bank->bus_width) && (count > 0); i++, count--) + *buffer++ = current_word[i]; + } + + return ERROR_OK; +} + +static int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count) { struct cfi_flash_bank *cfi_info = bank->driver_priv; struct target *target = bank->target; uint32_t address = bank->base + offset; /* address of first byte to be programmed */ - uint32_t write_p, copy_p; + uint32_t write_p; int align; /* number of unaligned bytes */ int blk_count; /* number of bus_width bytes for block copy */ uint8_t current_word[CFI_MAX_BUS_WIDTH * 4]; /* word (bus_width size) currently being programmed */ @@ -1886,44 +1927,18 @@ int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_ { LOG_INFO("Fixup %d unaligned head bytes", align); - for (i = 0; i < bank->bus_width; i++) - current_word[i] = 0; - copy_p = write_p; - - /* copy bytes before the first write address */ - for (i = 0; i < align; ++i, ++copy_p) - { - uint8_t byte; - if ((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) - { - return retval; - } - cfi_add_byte(bank, current_word, byte); - } - - /* add bytes from the buffer */ - for (; (i < bank->bus_width) && (count > 0); i++) - { - cfi_add_byte(bank, current_word, *buffer++); - count--; - copy_p++; - } + /* read a complete word from flash */ + if ((retval = target_read_memory(target, write_p, bank->bus_width, 1, current_word)) != ERROR_OK) + return retval; - /* if the buffer is already finished, copy bytes after the last write address */ - for (; (count == 0) && (i < bank->bus_width); ++i, ++copy_p) - { - uint8_t byte; - if ((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) - { - return retval; - } - cfi_add_byte(bank, current_word, byte); - } + /* replace only bytes that must be written */ + for (i = align; (i < bank->bus_width) && (count > 0); i++, count--) + current_word[i] = *buffer++; retval = cfi_write_word(bank, current_word, write_p); if (retval != ERROR_OK) return retval; - write_p = copy_p; + write_p += bank->bus_width; } /* handle blocks of bus_size aligned bytes */ @@ -1954,22 +1969,12 @@ int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_ { if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) { - //adjust buffersize for chip width + /* Calculate buffer size and boundary mask */ + /* buffersize is (buffer size per chip) * (number of chips) */ + /* bufferwsize is buffersize in words */ uint32_t buffersize = (1UL << cfi_info->max_buf_write_size) * (bank->bus_width / bank->chip_width); uint32_t buffermask = buffersize-1; - uint32_t bufferwsize; - - switch (bank->chip_width) - { - case 4 : bufferwsize = buffersize / 4; break; - case 2 : bufferwsize = buffersize / 2; break; - case 1 : bufferwsize = buffersize; break; - default: - LOG_ERROR("Unsupported chip width %d", bank->chip_width); - return ERROR_FLASH_OPERATION_FAILED; - } - - bufferwsize/=(bank->bus_width / bank->chip_width); + uint32_t bufferwsize = buffersize / bank->bus_width; /* fall back to memory writes */ while (count >= (uint32_t)bank->bus_width) @@ -1995,12 +2000,7 @@ int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_ if (fallback) { for (i = 0; i < bank->bus_width; i++) - current_word[i] = 0; - - for (i = 0; i < bank->bus_width; i++) - { - cfi_add_byte(bank, current_word, *buffer++); - } + current_word[i] = *buffer++; retval = cfi_write_word(bank, current_word, write_p); if (retval != ERROR_OK) @@ -2016,13 +2016,7 @@ int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_ } /* return to read array mode, so we can read from flash again for padding */ - cfi_command(bank, 0xf0, current_word); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) - { - return retval; - } - cfi_command(bank, 0xff, current_word); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) + if ((retval = cfi_reset(bank)) != ERROR_OK) { return retval; } @@ -2032,37 +2026,21 @@ int cfi_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_ { LOG_INFO("Fixup %" PRId32 " unaligned tail bytes", count); - copy_p = write_p; - for (i = 0; i < bank->bus_width; i++) - current_word[i] = 0; + /* read a complete word from flash */ + if ((retval = target_read_memory(target, write_p, bank->bus_width, 1, current_word)) != ERROR_OK) + return retval; + + /* replace only bytes that must be written */ + for (i = 0; (i < bank->bus_width) && (count > 0); i++, count--) + current_word[i] = *buffer++; - for (i = 0; (i < bank->bus_width) && (count > 0); ++i, ++copy_p) - { - cfi_add_byte(bank, current_word, *buffer++); - count--; - } - for (; i < bank->bus_width; ++i, ++copy_p) - { - uint8_t byte; - if ((retval = target_read_memory(target, copy_p, 1, 1, &byte)) != ERROR_OK) - { - return retval; - } - cfi_add_byte(bank, current_word, byte); - } retval = cfi_write_word(bank, current_word, write_p); if (retval != ERROR_OK) return retval; } /* return to read array mode */ - cfi_command(bank, 0xf0, current_word); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word)) != ERROR_OK) - { - return retval; - } - cfi_command(bank, 0xff, current_word); - return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, current_word); + return cfi_reset(bank); } static void cfi_fixup_atmel_reversed_erase_regions(struct flash_bank *bank, void *param) @@ -2111,12 +2089,9 @@ static void cfi_fixup_0002_unlock_addresses(struct flash_bank *bank, void *param static int cfi_query_string(struct flash_bank *bank, int address) { struct cfi_flash_bank *cfi_info = bank->driver_priv; - struct target *target = bank->target; int retval; - uint8_t command[8]; - cfi_command(bank, 0x98, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, address), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x98, flash_address(bank, 0, address))) != ERROR_OK) { return retval; } @@ -2129,13 +2104,7 @@ static int cfi_query_string(struct flash_bank *bank, int address) if ((cfi_info->qry[0] != 'Q') || (cfi_info->qry[1] != 'R') || (cfi_info->qry[2] != 'Y')) { - cfi_command(bank, 0xf0, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) - { - return retval; - } - cfi_command(bank, 0xff, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_reset(bank)) != ERROR_OK) { return retval; } @@ -2150,13 +2119,13 @@ static int cfi_probe(struct flash_bank *bank) { struct cfi_flash_bank *cfi_info = bank->driver_priv; struct target *target = bank->target; - uint8_t command[8]; int num_sectors = 0; int i; int sector = 0; uint32_t unlock1 = 0x555; uint32_t unlock2 = 0x2aa; int retval; + uint8_t value_buf0[CFI_MAX_BUS_WIDTH], value_buf1[CFI_MAX_BUS_WIDTH]; if (bank->target->state != TARGET_HALTED) { @@ -2165,6 +2134,16 @@ static int cfi_probe(struct flash_bank *bank) } cfi_info->probed = 0; + if (bank->sectors) + { + free(bank->sectors); + bank->sectors = NULL; + } + if(cfi_info->erase_region_info) + { + free(cfi_info->erase_region_info); + cfi_info->erase_region_info = NULL; + } /* JEDEC standard JESD21C uses 0x5555 and 0x2aaa as unlock addresses, * while CFI compatible AMD/Spansion flashes use 0x555 and 0x2aa @@ -2176,57 +2155,48 @@ static int cfi_probe(struct flash_bank *bank) } /* switch to read identifier codes mode ("AUTOSELECT") */ - cfi_command(bank, 0xaa, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xaa, flash_address(bank, 0, unlock1))) != ERROR_OK) { return retval; } - cfi_command(bank, 0x55, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, unlock2), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x55, flash_address(bank, 0, unlock2))) != ERROR_OK) { return retval; } - cfi_command(bank, 0x90, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x90, flash_address(bank, 0, unlock1))) != ERROR_OK) { return retval; } - if (bank->chip_width == 1) + if ((retval = target_read_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, value_buf0)) != ERROR_OK) { - uint8_t manufacturer, device_id; - if ((retval = target_read_u8(target, flash_address(bank, 0, 0x00), &manufacturer)) != ERROR_OK) - { - return retval; - } - if ((retval = target_read_u8(target, flash_address(bank, 0, 0x01), &device_id)) != ERROR_OK) - { - return retval; - } - cfi_info->manufacturer = manufacturer; - cfi_info->device_id = device_id; + return retval; } - else if (bank->chip_width == 2) + if ((retval = target_read_memory(target, flash_address(bank, 0, 0x01), bank->bus_width, 1, value_buf1)) != ERROR_OK) { - if ((retval = target_read_u16(target, flash_address(bank, 0, 0x00), &cfi_info->manufacturer)) != ERROR_OK) - { - return retval; - } - if ((retval = target_read_u16(target, flash_address(bank, 0, 0x01), &cfi_info->device_id)) != ERROR_OK) - { - return retval; - } + return retval; + } + switch (bank->chip_width) { + case 1: + cfi_info->manufacturer = *value_buf0; + cfi_info->device_id = *value_buf1; + break; + case 2: + cfi_info->manufacturer = target_buffer_get_u16(target, value_buf0); + cfi_info->device_id = target_buffer_get_u16(target, value_buf1); + break; + case 4: + cfi_info->manufacturer = target_buffer_get_u32(target, value_buf0); + cfi_info->device_id = target_buffer_get_u32(target, value_buf1); + break; + default: + LOG_ERROR("Unsupported bank chipwidth %d, can't probe memory", bank->chip_width); + return ERROR_FLASH_OPERATION_FAILED; } LOG_INFO("Flash Manufacturer/Device: 0x%04x 0x%04x", cfi_info->manufacturer, cfi_info->device_id); /* switch back to read array mode */ - cfi_command(bank, 0xf0, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK) - { - return retval; - } - cfi_command(bank, 0xff, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x00), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_reset(bank)) != ERROR_OK) { return retval; } @@ -2284,7 +2254,7 @@ static int cfi_probe(struct flash_bank *bank) cfi_info->block_erase_timeout_max = cfi_query_u8(bank, 0, 0x25); cfi_info->chip_erase_timeout_max = cfi_query_u8(bank, 0, 0x26); - LOG_DEBUG("Vcc min: %1.1x.%1.1x, Vcc max: %1.1x.%1.1x, Vpp min: %1.1x.%1.1x, Vpp max: %1.1x.%1.1x", + LOG_DEBUG("Vcc min: %x.%x, Vcc max: %x.%x, Vpp min: %u.%x, Vpp max: %u.%x", (cfi_info->vcc_min & 0xf0) >> 4, cfi_info->vcc_min & 0x0f, (cfi_info->vcc_max & 0xf0) >> 4, cfi_info->vcc_max & 0x0f, (cfi_info->vpp_min & 0xf0) >> 4, cfi_info->vpp_min & 0x0f, @@ -2343,13 +2313,7 @@ static int cfi_probe(struct flash_bank *bank) /* return to read array mode * we use both reset commands, as some Intel flashes fail to recognize the 0xF0 command */ - cfi_command(bank, 0xf0, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) - { - return retval; - } - cfi_command(bank, 0xff, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_reset(bank)) != ERROR_OK) { return retval; } @@ -2433,22 +2397,18 @@ static int cfi_auto_probe(struct flash_bank *bank) return cfi_probe(bank); } - static int cfi_intel_protect_check(struct flash_bank *bank) { int retval; struct cfi_flash_bank *cfi_info = bank->driver_priv; struct cfi_intel_pri_ext *pri_ext = cfi_info->pri_ext; - struct target *target = bank->target; - uint8_t command[CFI_MAX_BUS_WIDTH]; int i; /* check if block lock bits are supported on this device */ if (!(pri_ext->blk_status_reg_mask & 0x1)) return ERROR_FLASH_OPERATION_FAILED; - cfi_command(bank, 0x90, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, 0x55), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x90, flash_address(bank, 0, 0x55))) != ERROR_OK) { return retval; } @@ -2463,8 +2423,7 @@ static int cfi_intel_protect_check(struct flash_bank *bank) bank->sectors[i].is_protected = 0; } - cfi_command(bank, 0xff, command); - return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + return cfi_send_command(bank, 0xff, flash_address(bank, 0, 0x0)); } static int cfi_spansion_protect_check(struct flash_bank *bank) @@ -2472,24 +2431,19 @@ static int cfi_spansion_protect_check(struct flash_bank *bank) int retval; struct cfi_flash_bank *cfi_info = bank->driver_priv; struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; - struct target *target = bank->target; - uint8_t command[8]; int i; - cfi_command(bank, 0xaa, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0xaa, flash_address(bank, 0, pri_ext->_unlock1))) != ERROR_OK) { return retval; } - cfi_command(bank, 0x55, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock2), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x55, flash_address(bank, 0, pri_ext->_unlock2))) != ERROR_OK) { return retval; } - cfi_command(bank, 0x90, command); - if ((retval = target_write_memory(target, flash_address(bank, 0, pri_ext->_unlock1), bank->bus_width, 1, command)) != ERROR_OK) + if ((retval = cfi_send_command(bank, 0x90, flash_address(bank, 0, pri_ext->_unlock1))) != ERROR_OK) { return retval; } @@ -2504,8 +2458,7 @@ static int cfi_spansion_protect_check(struct flash_bank *bank) bank->sectors[i].is_protected = 0; } - cfi_command(bank, 0xf0, command); - return target_write_memory(target, flash_address(bank, 0, 0x0), bank->bus_width, 1, command); + return cfi_send_command(bank, 0xf0, flash_address(bank, 0, 0x0)); } static int cfi_protect_check(struct flash_bank *bank) @@ -2567,7 +2520,7 @@ static int cfi_info(struct flash_bank *bank, char *buf, int buf_size) buf += printed; buf_size -= printed; - printed = snprintf(buf, buf_size, "Vcc min: %1.1x.%1.1x, Vcc max: %1.1x.%1.1x, Vpp min: %1.1x.%1.1x, Vpp max: %1.1x.%1.1x\n", + printed = snprintf(buf, buf_size, "Vcc min: %x.%x, Vcc max: %x.%x, Vpp min: %u.%x, Vpp max: %u.%x\n", (cfi_info->vcc_min & 0xf0) >> 4, cfi_info->vcc_min & 0x0f, (cfi_info->vcc_max & 0xf0) >> 4, cfi_info->vcc_max & 0x0f, (cfi_info->vpp_min & 0xf0) >> 4, cfi_info->vpp_min & 0x0f, @@ -2617,14 +2570,16 @@ static int cfi_info(struct flash_bank *bank, char *buf, int buf_size) } struct flash_driver cfi_flash = { - .name = "cfi", - .flash_bank_command = &cfi_flash_bank_command, - .erase = &cfi_erase, - .protect = &cfi_protect, - .write = &cfi_write, - .probe = &cfi_probe, - .auto_probe = &cfi_auto_probe, - .erase_check = &default_flash_blank_check, - .protect_check = &cfi_protect_check, - .info = &cfi_info, - }; + .name = "cfi", + .flash_bank_command = cfi_flash_bank_command, + .erase = cfi_erase, + .protect = cfi_protect, + .write = cfi_write, + .read = cfi_read, + .probe = cfi_probe, + .auto_probe = cfi_auto_probe, + /* FIXME: access flash at bus_width size */ + .erase_check = default_flash_blank_check, + .protect_check = cfi_protect_check, + .info = cfi_info, +};