X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fcfi.c;h=71270b99a944d338defbcac7239312ff5d076483;hb=24653c950a18c49d267efb17a36423d9c455a886;hp=cf83271def961cc9dd6e097e6198d2b210cea898;hpb=d1bc4375e99ce52b72988494f35beca364234bae;p=openocd.git diff --git a/src/flash/nor/cfi.c b/src/flash/nor/cfi.c index cf83271def..71270b99a9 100644 --- a/src/flash/nor/cfi.c +++ b/src/flash/nor/cfi.c @@ -23,11 +23,12 @@ #include "config.h" #endif +#include "imp.h" #include "cfi.h" #include "non_cfi.h" -#include "armv4_5.h" +#include #include -#include "algorithm.h" +#include #define CFI_MAX_BUS_WIDTH 4 @@ -1011,7 +1012,7 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, uint3 struct cfi_flash_bank *cfi_info = bank->driver_priv; struct target *target = bank->target; struct reg_param reg_params[7]; - struct armv4_5_algorithm armv4_5_info; + struct arm_algorithm armv4_5_info; struct working_area *source; uint32_t buffer_size = 32768; uint32_t write_command_val, busy_pattern_val, error_pattern_val; @@ -1084,9 +1085,9 @@ static int cfi_intel_write_block(struct flash_bank *bank, uint8_t *buffer, uint3 cfi_intel_clear_status_register(bank); - armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; - armv4_5_info.core_mode = ARMV4_5_MODE_SVC; - armv4_5_info.core_state = ARMV4_5_STATE_ARM; + armv4_5_info.common_magic = ARM_COMMON_MAGIC; + armv4_5_info.core_mode = ARM_MODE_SVC; + armv4_5_info.core_state = ARM_STATE_ARM; /* If we are setting up the write_algorith, we need target_code_src */ /* if not we only need target_code_size. */ @@ -1256,7 +1257,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, ui struct cfi_spansion_pri_ext *pri_ext = cfi_info->pri_ext; struct target *target = bank->target; struct reg_param reg_params[10]; - struct armv4_5_algorithm armv4_5_info; + struct arm_algorithm armv4_5_info; struct working_area *source; uint32_t buffer_size = 32768; uint32_t status; @@ -1407,9 +1408,9 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer, ui 0xeafffffe /* b 8204 */ }; - armv4_5_info.common_magic = ARMV4_5_COMMON_MAGIC; - armv4_5_info.core_mode = ARMV4_5_MODE_SVC; - armv4_5_info.core_state = ARMV4_5_STATE_ARM; + armv4_5_info.common_magic = ARM_COMMON_MAGIC; + armv4_5_info.core_mode = ARM_MODE_SVC; + armv4_5_info.core_state = ARM_STATE_ARM; int target_code_size; const uint32_t *target_code_src;