X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fat91sam3.c;h=6fe71bfb9732e0ce1dc128604e3d662a07d5d602;hb=f2f99a9e0a1edff2f688146b923b4d24f93c7abf;hp=3369dda9923e99b5ffc072fac5feaa0651e81612;hpb=b3d4a44686c8ed14baab7c466f14321b2dc5fec8;p=openocd.git

diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c
index 3369dda992..6fe71bfb97 100644
--- a/src/flash/nor/at91sam3.c
+++ b/src/flash/nor/at91sam3.c
@@ -979,6 +979,102 @@ static const struct sam3_chip_details all_sam3_details[] = {
 			},
 		},
 	},
+	{
+		.chipid_cidr    = 0x288B0A60,
+		.name           = "at91sam3s8a",
+		.total_flash_size     = 256 * 2048,
+		.total_sram_size      = 64 * 1024,
+		.n_gpnvms       = 2,
+		.n_banks        = 1,
+		{
+/*		.bank[0] = { */
+			{
+				.probed = 0,
+				.pChip  = NULL,
+				.pBank  = NULL,
+				.bank_number = 0,
+				.base_address = FLASH_BANK_BASE_S,
+				.controller_address = 0x400e0a00,
+				.flash_wait_states = 6,	/* workaround silicon bug */
+				.present = 1,
+				.size_bytes = 256 * 2048,
+				.nsectors   = 16,
+				.sector_size = 32768,
+				.page_size   = 256,
+			},
+/*		.bank[1] = { */
+			{
+				.present = 0,
+				.probed = 0,
+				.bank_number = 1,
+
+			},
+		},
+	},
+	{
+		.chipid_cidr    = 0x289B0A60,
+		.name           = "at91sam3s8b",
+		.total_flash_size     = 256 * 2048,
+		.total_sram_size      = 64 * 1024,
+		.n_gpnvms       = 2,
+		.n_banks        = 1,
+		{
+/*		.bank[0] = { */
+			{
+				.probed = 0,
+				.pChip  = NULL,
+				.pBank  = NULL,
+				.bank_number = 0,
+				.base_address = FLASH_BANK_BASE_S,
+				.controller_address = 0x400e0a00,
+				.flash_wait_states = 6,	/* workaround silicon bug */
+				.present = 1,
+				.size_bytes = 256 * 2048,
+				.nsectors   = 16,
+				.sector_size = 32768,
+				.page_size   = 256,
+			},
+/*		.bank[1] = { */
+			{
+				.present = 0,
+				.probed = 0,
+				.bank_number = 1,
+
+			},
+		},
+	},
+	{
+		.chipid_cidr    = 0x28AB0A60,
+		.name           = "at91sam3s8c",
+		.total_flash_size     = 256 * 2048,
+		.total_sram_size      = 64 * 1024,
+		.n_gpnvms       = 2,
+		.n_banks        = 1,
+		{
+/*		.bank[0] = { */
+			{
+				.probed = 0,
+				.pChip  = NULL,
+				.pBank  = NULL,
+				.bank_number = 0,
+				.base_address = FLASH_BANK_BASE_S,
+				.controller_address = 0x400e0a00,
+				.flash_wait_states = 6,	/* workaround silicon bug */
+				.present = 1,
+				.size_bytes = 256 * 2048,
+				.nsectors   = 16,
+				.sector_size = 32768,
+				.page_size   = 256,
+			},
+/*		.bank[1] = { */
+			{
+				.present = 0,
+				.probed = 0,
+				.bank_number = 1,
+
+			},
+		},
+	},
 
 	/* Start at91sam3n* series */
 	{
@@ -3083,16 +3179,6 @@ static int sam3_protect(struct flash_bank *bank, int set, int first, int last)
 
 }
 
-static int sam3_info(struct flash_bank *bank, char *buf, int buf_size)
-{
-	if (bank->target->state != TARGET_HALTED) {
-		LOG_ERROR("Target not halted");
-		return ERROR_TARGET_NOT_HALTED;
-	}
-	buf[0] = 0;
-	return ERROR_OK;
-}
-
 static int sam3_page_read(struct sam3_bank_private *pPrivate, unsigned pagenum, uint8_t *buf)
 {
 	uint32_t adr;
@@ -3637,5 +3723,4 @@ struct flash_driver at91sam3_flash = {
 	.auto_probe = sam3_auto_probe,
 	.erase_check = sam3_erase_check,
 	.protect_check = sam3_protect_check,
-	.info = sam3_info,
 };