X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fat91sam7.c;h=bb2a28f5a33e17daf134d94b1bb17bc9f720fa01;hb=6d1d58a1fc3dfd60e9cac89460b5a6e438d11efa;hp=cfe0a435be8f59d0a7fc18f9cca581760ce7c595;hpb=9e343a4102c6df6e4ccc68caea2fb5453fe03743;p=openocd.git diff --git a/src/flash/at91sam7.c b/src/flash/at91sam7.c index cfe0a435be..bb2a28f5a3 100644 --- a/src/flash/at91sam7.c +++ b/src/flash/at91sam7.c @@ -107,7 +107,7 @@ static int at91sam7_register_commands(struct command_context_s *cmd_ctx) command_t *at91sam7_cmd = register_command(cmd_ctx, NULL, "at91sam7", NULL, COMMAND_ANY, NULL); register_command(cmd_ctx, at91sam7_cmd, "gpnvm", at91sam7_handle_gpnvm_command, COMMAND_EXEC, - "at91sam7 gpnvm set|clear, set or clear one gpnvm bit"); + "at91sam7 gpnvm set | clear, set or clear one gpnvm bit"); return ERROR_OK; } @@ -213,29 +213,29 @@ static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode) if (at91sam7_info->cidr_arch == 0x60) { /* AT91SAM7A3 uses master clocks in 100 ns */ - fmcn = (at91sam7_info->mck_freq/10000000ul)+1; + fmcn = (at91sam7_info->mck_freq/10000000ul) + 1; } else { /* master clocks in 1uS for ARCH 0x7 types */ - fmcn = (at91sam7_info->mck_freq/1000000ul)+1; + fmcn = (at91sam7_info->mck_freq/1000000ul) + 1; } } else if (mode == FMR_TIMING_FLASH) { /* main clocks in 1.5uS */ fmcn = (at91sam7_info->mck_freq/1000000ul)+ - (at91sam7_info->mck_freq/2000000ul)+1; + (at91sam7_info->mck_freq/2000000ul) + 1; } /* hard overclocking */ if (fmcn > 0xFF) fmcn = 0xFF; - /* Only allow fmcn=0 if clock period is > 30 us = 33kHz. */ + /* Only allow fmcn = 0 if clock period is > 30 us = 33kHz. */ if (at91sam7_info->mck_freq <= 33333ul) fmcn = 0; - /* Only allow fws=0 if clock frequency is < 30 MHz. */ + /* Only allow fws = 0 if clock frequency is < 30 MHz. */ if (at91sam7_info->mck_freq > 30000000ul) fws = 1; @@ -280,11 +280,11 @@ static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16 at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; target_t *target = bank->target; - fcr = (0x5A<<24) | ((pagen&0x3FF)<<8) | cmd; + fcr = (0x5A << 24) | ((pagen&0x3FF) << 8) | cmd; target_write_u32(target, MC_FCR[bank->bank_number], fcr); - LOG_DEBUG("Flash command: 0x%" PRIx32 ", flash bank: %i, page number: %u", fcr, bank->bank_number+1, pagen); + LOG_DEBUG("Flash command: 0x%" PRIx32 ", flash bank: %i, page number: %u", fcr, bank->bank_number + 1, pagen); - if ((at91sam7_info->cidr_arch == 0x60)&&((cmd==SLB)|(cmd==CLB))) + if ((at91sam7_info->cidr_arch == 0x60) && ((cmd == SLB) | (cmd == CLB))) { /* Lock bit manipulation on AT91SAM7A3 waits for FC_FSR bit 1, EOL */ if (at91sam7_wait_status_busy(bank, MC_FSR_EOL, 10)&0x0C) @@ -366,13 +366,13 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank) at91sam7_info = t_bank->driver_priv; at91sam7_info->cidr = cidr; - at91sam7_info->cidr_ext = (cidr>>31)&0x0001; - at91sam7_info->cidr_nvptyp = (cidr>>28)&0x0007; - at91sam7_info->cidr_arch = (cidr>>20)&0x00FF; - at91sam7_info->cidr_sramsiz = (cidr>>16)&0x000F; - at91sam7_info->cidr_nvpsiz2 = (cidr>>12)&0x000F; - at91sam7_info->cidr_nvpsiz = (cidr>>8)&0x000F; - at91sam7_info->cidr_eproc = (cidr>>5)&0x0007; + at91sam7_info->cidr_ext = (cidr >> 31)&0x0001; + at91sam7_info->cidr_nvptyp = (cidr >> 28)&0x0007; + at91sam7_info->cidr_arch = (cidr >> 20)&0x00FF; + at91sam7_info->cidr_sramsiz = (cidr >> 16)&0x000F; + at91sam7_info->cidr_nvpsiz2 = (cidr >> 12)&0x000F; + at91sam7_info->cidr_nvpsiz = (cidr >> 8)&0x000F; + at91sam7_info->cidr_eproc = (cidr >> 5)&0x0007; at91sam7_info->cidr_version = cidr&0x001F; /* calculate master clock frequency */ @@ -391,10 +391,10 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank) return ERROR_OK; } - arch = (cidr>>20)&0x00FF; + arch = (cidr >> 20)&0x00FF; /* check flash size */ - switch ((cidr>>8)&0x000F) + switch ((cidr >> 8)&0x000F) { case FLASH_SIZE_8KB: break; @@ -550,7 +550,7 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank) /* calculate bank size */ bank_size = sectors_num * pages_per_sector * page_size; - for (bnk=0; bnk 0) { @@ -575,7 +575,7 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank) /* allocate sectors */ t_bank->sectors = malloc(sectors_num * sizeof(flash_sector_t)); - for (sec=0; secsectors[sec].offset = sec * pages_per_sector * page_size; t_bank->sectors[sec].size = pages_per_sector * page_size; @@ -586,13 +586,13 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank) at91sam7_info = t_bank->driver_priv; at91sam7_info->cidr = cidr; - at91sam7_info->cidr_ext = (cidr>>31)&0x0001; - at91sam7_info->cidr_nvptyp = (cidr>>28)&0x0007; - at91sam7_info->cidr_arch = (cidr>>20)&0x00FF; - at91sam7_info->cidr_sramsiz = (cidr>>16)&0x000F; - at91sam7_info->cidr_nvpsiz2 = (cidr>>12)&0x000F; - at91sam7_info->cidr_nvpsiz = (cidr>>8)&0x000F; - at91sam7_info->cidr_eproc = (cidr>>5)&0x0007; + at91sam7_info->cidr_ext = (cidr >> 31)&0x0001; + at91sam7_info->cidr_nvptyp = (cidr >> 28)&0x0007; + at91sam7_info->cidr_arch = (cidr >> 20)&0x00FF; + at91sam7_info->cidr_sramsiz = (cidr >> 16)&0x000F; + at91sam7_info->cidr_nvpsiz2 = (cidr >> 12)&0x000F; + at91sam7_info->cidr_nvpsiz = (cidr >> 8)&0x000F; + at91sam7_info->cidr_eproc = (cidr >> 5)&0x0007; at91sam7_info->cidr_version = cidr&0x001F; at91sam7_info->target_name = target_name; @@ -639,9 +639,9 @@ static int at91sam7_erase_check(struct flash_bank_s *bank) at91sam7_set_flash_mode(bank, FMR_TIMING_FLASH); fast_check = 1; - for (nSector=0; nSectornum_sectors; nSector++) + for (nSector = 0; nSector < bank->num_sectors; nSector++) { - retval = target_blank_check_memory(target, bank->base+bank->sectors[nSector].offset, + retval = target_blank_check_memory(target, bank->base + bank->sectors[nSector].offset, bank->sectors[nSector].size, &blank); if (retval != ERROR_OK) { @@ -662,15 +662,15 @@ static int at91sam7_erase_check(struct flash_bank_s *bank) LOG_USER("Running slow fallback erase check - add working memory"); buffer = malloc(bank->sectors[0].size); - for (nSector=0; nSectornum_sectors; nSector++) + for (nSector = 0; nSector < bank->num_sectors; nSector++) { bank->sectors[nSector].is_erased = 1; - retval = target_read_memory(target, bank->base+bank->sectors[nSector].offset, 4, + retval = target_read_memory(target, bank->base + bank->sectors[nSector].offset, 4, bank->sectors[nSector].size/4, buffer); if (retval != ERROR_OK) return retval; - for (nByte=0; nBytesectors[nSector].size; nByte++) + for (nByte = 0; nByte < bank->sectors[nSector].size; nByte++) { if (buffer[nByte] != 0xFF) { @@ -702,12 +702,12 @@ static int at91sam7_protect_check(struct flash_bank_s *bank) } status = at91sam7_get_flash_status(bank->target, bank->bank_number); - at91sam7_info->lockbits = (status>>16); + at91sam7_info->lockbits = (status >> 16); at91sam7_info->num_lockbits_on = 0; - for (lock_pos=0; lock_posnum_sectors; lock_pos++) + for (lock_pos = 0; lock_pos < bank->num_sectors; lock_pos++) { - if ( ((status>>(16+lock_pos))&(0x0001)) == 1) + if ( ((status >> (16 + lock_pos))&(0x0001)) == 1) { at91sam7_info->num_lockbits_on++; bank->sectors[lock_pos].is_protected = 1; @@ -719,13 +719,13 @@ static int at91sam7_protect_check(struct flash_bank_s *bank) /* GPNVM and SECURITY bits apply only for MC_FSR of EFC0 */ status = at91sam7_get_flash_status(bank->target, 0); - at91sam7_info->securitybit = (status>>4)&0x01; - at91sam7_info->nvmbits = (status>>8)&0xFF; + at91sam7_info->securitybit = (status >> 4)&0x01; + at91sam7_info->nvmbits = (status >> 8)&0xFF; at91sam7_info->num_nvmbits_on = 0; - for (gpnvm_pos=0; gpnvm_posnum_nvmbits; gpnvm_pos++) + for (gpnvm_pos = 0; gpnvm_pos < at91sam7_info->num_nvmbits; gpnvm_pos++) { - if ( ((status>>(8+gpnvm_pos))&(0x01)) == 1) + if ( ((status >> (8 + gpnvm_pos))&(0x01)) == 1) { at91sam7_info->num_nvmbits_on++; } @@ -803,13 +803,13 @@ static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char * page_size = atoi(args[11]); num_nvmbits = atoi(args[12]); - target_name = calloc(strlen(args[7])+1, sizeof(char)); + target_name = calloc(strlen(args[7]) + 1, sizeof(char)); strcpy(target_name, args[7]); /* calculate bank size */ bank_size = num_sectors * pages_per_sector * page_size; - for (bnk=0; bnk 0) { @@ -834,7 +834,7 @@ static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char * /* allocate sectors */ t_bank->sectors = malloc(num_sectors * sizeof(flash_sector_t)); - for (sec=0; secsectors[sec].offset = sec * pages_per_sector * page_size; t_bank->sectors[sec].size = pages_per_sector * page_size; @@ -890,7 +890,7 @@ static int at91sam7_erase(struct flash_bank_s *bank, int first, int last) at91sam7_read_clock_info(bank); at91sam7_set_flash_mode(bank, FMR_TIMING_FLASH); - if(erase_all) + if (erase_all) { if (at91sam7_flash_command(bank, EA, 0) != ERROR_OK) { @@ -902,7 +902,7 @@ static int at91sam7_erase(struct flash_bank_s *bank, int first, int last) /* allocate and clean buffer */ nbytes = (last - first + 1) * bank->sectors[first].size; buffer = malloc(nbytes * sizeof(uint8_t)); - for (pos=0; possectors[sec].is_erased = 1; } @@ -952,7 +952,7 @@ static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int l at91sam7_read_clock_info(bank); at91sam7_set_flash_mode(bank, FMR_TIMING_NVBITS); - for (sector=first; sector<=last; sector++) + for (sector = first; sector <= last; sector++) { if (set) cmd = SLB; @@ -1016,9 +1016,9 @@ static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t o at91sam7_read_clock_info(bank); at91sam7_set_flash_mode(bank, FMR_TIMING_FLASH); - for (pagen=first_page; pagenbase+pagen*dst_min_alignment, 4, wcount, buffer+buffer_pos)) != ERROR_OK) + if ((retval = target_write_memory(target, bank->base + pagen*dst_min_alignment, 4, wcount, buffer + buffer_pos)) != ERROR_OK) { return retval; } @@ -1138,7 +1138,7 @@ static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char if (argc != 2) { - command_print(cmd_ctx, "at91sam7 gpnvm "); + command_print(cmd_ctx, "at91sam7 gpnvm "); return ERROR_OK; }