X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=doc%2Fopenocd.texi;h=ebd03c4cb2b02b181d9cee5cb5fc1d65b941b8f3;hb=c26bbf7a1b2a11e9cc369536332bff2faa223da8;hp=2719c2d97f90ee78442e29a84297ba4bfa85973f;hpb=6a66cccbad7e51ac1b3ea929ab0c86dd02617797;p=openocd.git diff --git a/doc/openocd.texi b/doc/openocd.texi index 2719c2d97f..ebd03c4cb2 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -2948,8 +2948,8 @@ Specifies the serial number of the adapter. Specifies the adapter layout to use. @end deffn -@deffn {Config Command} {hla_vid_pid} vid pid -The vendor ID and product ID of the device. +@deffn {Config Command} {hla_vid_pid} [vid pid]+ +Pairs of vendor IDs and product IDs of the device. @end deffn @deffn {Command} {hla_command} command @@ -4503,12 +4503,6 @@ and (if the target is using it) after SRST has been released on the scan chain. @item @b{reset-end} @* Issued as the final step in @command{reset} processing. -@ignore -@item @b{reset-halt-post} -@* Currently not used -@item @b{reset-halt-pre} -@* Currently not used -@end ignore @item @b{reset-init} @* Used by @b{reset init} command for board-specific initialization. This event fires after @emph{reset-deassert-post}. @@ -4525,12 +4519,6 @@ before @command{reset_init} is called. This is the most robust place to use @command{jtag_rclk} or @command{adapter_khz} to switch to a low JTAG clock rate, when reset disables PLLs needed to use a fast clock. -@ignore -@item @b{reset-wait-pos} -@* Currently not used -@item @b{reset-wait-pre} -@* Currently not used -@end ignore @item @b{resume-start} @* Before any target is resumed @item @b{resume-end} @@ -5888,9 +5876,6 @@ All members of the Stellaris LM3Sxxx, LM4x and Tiva C microcontroller families from Texas Instruments include internal flash. The driver automatically recognizes a number of these chips using the chip identification register, and autoconfigures itself. -@footnote{Currently there is a @command{stellaris mass_erase} command. -That seems pointless since the same effect can be had using the -standard @command{flash erase_address} command.} @example flash bank $_FLASHNAME stellaris 0 0 0 0 $_TARGETNAME @@ -5936,11 +5921,7 @@ as per the following example. flash bank $_FLASHNAME stm32f1x 0x08080000 0 0 0 $_TARGETNAME @end example -Some stm32f1x-specific commands -@footnote{Currently there is a @command{stm32f1x mass_erase} command. -That seems pointless since the same effect can be had using the -standard @command{flash erase_address} command.} -are defined: +Some stm32f1x-specific commands are defined: @deffn Command {stm32f1x lock} num Locks the entire stm32 device. @@ -5952,6 +5933,11 @@ Unlocks the entire stm32 device. The @var{num} parameter is a value shown by @command{flash banks}. @end deffn +@deffn Command {stm32f1x mass_erase} num +Mass erases the entire stm32f1x device. +The @var{num} parameter is a value shown by @command{flash banks}. +@end deffn + @deffn Command {stm32f1x options_read} num Read and display the stm32 option bytes written by the @command{stm32f1x options_write} command. @@ -5970,6 +5956,10 @@ include internal flash and use ARM Cortex-M3/M4/M7 cores. The driver automatically recognizes a number of these chips using the chip identification register, and autoconfigures itself. +@example +flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME +@end example + Note that some devices have been found that have a flash size register that contains an invalid value, to workaround this issue you can override the probed value used by the flash driver. @@ -5990,6 +5980,11 @@ Unlocks the entire stm32 device. The @var{num} parameter is a value shown by @command{flash banks}. @end deffn +@deffn Command {stm32f2x mass_erase} num +Mass erases the entire stm32f2x device. +The @var{num} parameter is a value shown by @command{flash banks}. +@end deffn + @deffn Command {stm32f2x options_read} num Reads and displays user options and (where implemented) boot_addr0, boot_addr1, optcr2. The @var{num} parameter is a value shown by @command{flash banks}. @@ -6015,6 +6010,10 @@ include internal flash and use ARM Cortex-M7 core. The driver automatically recognizes a number of these chips using the chip identification register, and autoconfigures itself. +@example +flash bank $_FLASHNAME stm32h7x 0 0 0 0 $_TARGETNAME +@end example + Note that some devices have been found that have a flash size register that contains an invalid value, to workaround this issue you can override the probed value used by the flash driver. @@ -6034,6 +6033,11 @@ The @var{num} parameter is a value shown by @command{flash banks}. Unlocks the entire stm32 device. The @var{num} parameter is a value shown by @command{flash banks}. @end deffn + +@deffn Command {stm32h7x mass_erase} num +Mass erases the entire stm32h7x device. +The @var{num} parameter is a value shown by @command{flash banks}. +@end deffn @end deffn @deffn {Flash Driver} stm32lx @@ -6042,6 +6046,10 @@ include internal flash and use ARM Cortex-M3 and Cortex-M0+ cores. The driver automatically recognizes a number of these chips using the chip identification register, and autoconfigures itself. +@example +flash bank $_FLASHNAME stm32lx 0 0 0 0 $_TARGETNAME +@end example + Note that some devices have been found that have a flash size register that contains an invalid value, to workaround this issue you can override the probed value used by the flash driver. If you use 0 as the bank base address, it tells the @@ -6054,6 +6062,16 @@ flash bank $_FLASHNAME stm32lx 0x08000000 0x20000 0 0 $_TARGETNAME Some stm32lx-specific commands are defined: +@deffn Command {stm32lx lock} num +Locks the entire stm32 device. +The @var{num} parameter is a value shown by @command{flash banks}. +@end deffn + +@deffn Command {stm32lx unlock} num +Unlocks the entire stm32 device. +The @var{num} parameter is a value shown by @command{flash banks}. +@end deffn + @deffn Command {stm32lx mass_erase} num Mass erases the entire stm32lx device (all flash banks and EEPROM data). This is the only way to unlock a protected flash (unless RDP @@ -6062,6 +6080,42 @@ The @var{num} parameter is a value shown by @command{flash banks}. @end deffn @end deffn +@deffn {Flash Driver} stm32l4x +All members of the STM32L4 microcontroller families from ST Microelectronics +include internal flash and use ARM Cortex-M4 cores. +The driver automatically recognizes a number of these chips using +the chip identification register, and autoconfigures itself. + +@example +flash bank $_FLASHNAME stm32l4x 0 0 0 0 $_TARGETNAME +@end example + +Note that some devices have been found that have a flash size register that contains +an invalid value, to workaround this issue you can override the probed value used by +the flash driver. + +@example +flash bank $_FLASHNAME stm32l4x 0x08000000 0x40000 0 0 $_TARGETNAME +@end example + +Some stm32l4x-specific commands are defined: + +@deffn Command {stm32l4x lock} num +Locks the entire stm32 device. +The @var{num} parameter is a value shown by @command{flash banks}. +@end deffn + +@deffn Command {stm32l4x unlock} num +Unlocks the entire stm32 device. +The @var{num} parameter is a value shown by @command{flash banks}. +@end deffn + +@deffn Command {stm32l4x mass_erase} num +Mass erases the entire stm32l4x device. +The @var{num} parameter is a value shown by @command{flash banks}. +@end deffn +@end deffn + @deffn {Flash Driver} str7x All members of the STR7 microcontroller family from ST Microelectronics include internal flash and use ARM7TDMI cores.