X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=doc%2Fopenocd.texi;h=e6a14673f732bc93415a65a5f5f09340020d79d6;hb=e2e8a5f467e8e35618ce4fbf16b8da4e682d8258;hp=6b461a30eb1959c33a68ecd9cb302a2606265eff;hpb=3a5f84f8187ce5b473f0eaafa0d68d1ab23ec0cd;p=openocd.git diff --git a/doc/openocd.texi b/doc/openocd.texi index 6b461a30eb..e6a14673f7 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -505,6 +505,12 @@ Texas Instruments has an adapter called @b{ICDI}. It is not to be confused with the FTDI based adapters that were originally fitted to their evaluation boards. This is the adapter fitted to the Stellaris LaunchPad. +@section USB Nuvoton Nu-Link +Nuvoton has an adapter called @b{Nu-Link}. +It is available either as stand-alone dongle and embedded on development boards. +It supports SWD, serial port bridge and mass storage for firmware update. +Both Nu-Link v1 and v2 are supported. + @section USB CMSIS-DAP based ARM has released a interface standard called CMSIS-DAP that simplifies connecting debuggers to ARM Cortex based targets @url{http://www.keil.com/support/man/docs/dapdebug/dapdebug_introduction.htm}. @@ -609,6 +615,12 @@ produced, PDF schematics are easily found and it is easy to make. @* A JTAG driver acting as a client for the JTAG VPI server interface. @* Link: @url{http://github.com/fjullien/jtag_vpi} +@item @b{jtag_dpi} +@* A JTAG driver acting as a client for the SystemVerilog Direct Programming +Interface (DPI) for JTAG devices. DPI allows OpenOCD to connect to the JTAG +interface of a hardware model written in SystemVerilog, for example, on an +emulation model of target hardware. + @item @b{xlnx_pcie_xvc} @* A JTAG driver exposing Xilinx Virtual Cable over PCI Express to OpenOCD as JTAG/SWD interface. @@ -712,8 +724,11 @@ Configuration files and scripts are searched for in @item the current directory, @item any search dir specified on the command line using the @option{-s} option, @item any search dir specified using the @command{add_script_search_dir} command, -@item @file{$HOME/.openocd} (not on Windows), @item a directory in the @env{OPENOCD_SCRIPTS} environment variable (if set), +@item @file{%APPDATA%/OpenOCD} (only on Windows), +@item @file{$HOME/Library/Preferences/org.openocd} (only on Darwin), +@item @file{$XDG_CONFIG_HOME/openocd} (@env{$XDG_CONFIG_HOME} defaults to @file{$HOME/.config}), +@item @file{$HOME/.openocd}, @item the site wide script library @file{$pkgdatadir/site} and @item the OpenOCD-supplied script library @file{$pkgdatadir/scripts}. @end enumerate @@ -3064,7 +3079,8 @@ This is a driver that supports multiple High Level Adapters. This type of adapter does not expose some of the lower level api's that OpenOCD would normally use to access the target. -Currently supported adapters include the STMicroelectronics ST-LINK and TI ICDI. +Currently supported adapters include the STMicroelectronics ST-LINK, TI ICDI +and Nuvoton Nu-Link. ST-LINK firmware version >= V2.J21.S4 recommended due to issues with earlier versions of firmware where serial number is reset after first use. Suggest using ST firmware update utility to upgrade ST-LINK firmware even if current @@ -3078,7 +3094,7 @@ Currently Not Supported. Specifies the serial number of the adapter. @end deffn -@deffn {Config Command} {hla_layout} (@option{stlink}|@option{icdi}) +@deffn {Config Command} {hla_layout} (@option{stlink}|@option{icdi}|@option{nulink}) Specifies the adapter layout to use. @end deffn @@ -3228,6 +3244,22 @@ This value is only used with the standard variant. @end deffn @end deffn + +@deffn {Interface Driver} {jtag_dpi} +SystemVerilog Direct Programming Interface (DPI) compatible driver for +JTAG devices in emulation. The driver acts as a client for the SystemVerilog +DPI server interface. + +@deffn {Config Command} {jtag_dpi_set_port} port +Specifies the TCP/IP port number of the SystemVerilog DPI server interface. +@end deffn + +@deffn {Config Command} {jtag_dpi_set_address} address +Specifies the TCP/IP address of the SystemVerilog DPI server interface. +@end deffn +@end deffn + + @section Transport Configuration @cindex Transport As noted earlier, depending on the version of OpenOCD you use, @@ -4637,7 +4669,8 @@ The value should normally correspond to a static mapping for the @item @code{-rtos} @var{rtos_type} -- enable rtos support for target, @var{rtos_type} can be one of @option{auto}, @option{eCos}, @option{ThreadX}, @option{FreeRTOS}, @option{linux}, @option{ChibiOS}, -@option{embKernel}, @option{mqx}, @option{uCOS-III}, @option{nuttx} +@option{embKernel}, @option{mqx}, @option{uCOS-III}, @option{nuttx}, +@option{RIOT} @xref{gdbrtossupport,,RTOS Support}. @item @code{-defer-examine} -- skip target examination at initial JTAG chain @@ -4661,6 +4694,11 @@ possible values of the parameter @var{number}, which are not only numeric values Use this option to override, for this target only, the global parameter set with command @command{gdb_port}. @xref{gdb_port,,command gdb_port}. + +@item @code{-gdb-max-connections} @var{number} -- EXPERIMENTAL: set the maximum +number of GDB connections that are allowed for the target. Default is 1. +A negative value for @var{number} means unlimited connections. +See @xref{gdbmeminspect,,Using GDB as a non-intrusive memory inspector}. @end itemize @end deffn @@ -8560,7 +8598,7 @@ CTI is mandatory for core run control and each core has an individual CTI instance attached to it. OpenOCD has limited support for CTI using the @emph{cti} group of commands. -@deffn Command {cti create} cti_name @option{-dap} dap_name @option{-ap-num} apn @option{-ctibase} base_address +@deffn Command {cti create} cti_name @option{-dap} dap_name @option{-ap-num} apn @option{-baseaddr} base_address Creates a CTI instance @var{cti_name} on the DAP instance @var{dap_name} on MEM-AP @var{apn}. The @var{base_address} must match the base address of the CTI on the respective MEM-AP. All arguments are mandatory. This creates a @@ -9341,6 +9379,12 @@ target code relies on. In a configuration file, the command would typically be c However, normally it is not necessary to use the command at all. @end deffn +@deffn Command {aarch64 disassemble} address [count] +@cindex disassemble +Disassembles @var{count} instructions starting at @var{address}. +If @var{count} is not specified, a single instruction is disassembled. +@end deffn + @deffn Command {aarch64 smp} [on|off] Display, enable or disable SMP handling mode. The state of SMP handling influences the way targets in an SMP group are handled by the run control. With SMP handling enabled, issuing halt or resume to one core will trigger @@ -9675,8 +9719,31 @@ This is used to access 64-bit floating point registers on 32-bit targets. @end deffn @deffn Command {riscv set_prefer_sba} on|off -When on, prefer to use System Bus Access to access memory. When off, prefer to -use the Program Buffer to access memory. +When on, prefer to use System Bus Access to access memory. When off (default), +prefer to use the Program Buffer to access memory. +@end deffn + +@deffn Command {riscv set_enable_virtual} on|off +When on, memory accesses are performed on physical or virtual memory depending +on the current system configuration. When off (default), all memory accessses are performed +on physical memory. +@end deffn + +@deffn Command {riscv set_enable_virt2phys} on|off +When on (default), memory accesses are performed on physical or virtual memory +depending on the current satp configuration. When off, all memory accessses are +performed on physical memory. +@end deffn + +@deffn Command {riscv resume_order} normal|reversed +Some software assumes all harts are executing nearly continuously. Such +software may be sensitive to the order that harts are resumed in. On harts +that don't support hasel, this option allows the user to choose the order the +harts are resumed in. If you are using this option, it's probably masking a +race condition problem in your code. + +Normal order is from lowest hart index to highest. This is the default +behavior. Reversed order is from highest hart index to lowest. @end deffn @deffn Command {riscv set_ir} (@option{idcode}|@option{dtmcs}|@option{dmi}) [value] @@ -9690,6 +9757,26 @@ When utilizing version 0.11 of the RISC-V Debug Specification, and DBUS registers, respectively. @end deffn +@deffn Command {riscv use_bscan_tunnel} value +Enable or disable use of a BSCAN tunnel to reach DM. Supply the width of +the DM transport TAP's instruction register to enable. Supply a value of 0 to disable. +@end deffn + +@deffn Command {riscv set_ebreakm} on|off +Control dcsr.ebreakm. When on (default), M-mode ebreak instructions trap to +OpenOCD. When off, they generate a breakpoint exception handled internally. +@end deffn + +@deffn Command {riscv set_ebreaks} on|off +Control dcsr.ebreaks. When on (default), S-mode ebreak instructions trap to +OpenOCD. When off, they generate a breakpoint exception handled internally. +@end deffn + +@deffn Command {riscv set_ebreaku} on|off +Control dcsr.ebreaku. When on (default), U-mode ebreak instructions trap to +OpenOCD. When off, they generate a breakpoint exception handled internally. +@end deffn + @subsection RISC-V Authentication Commands The following commands can be used to authenticate to a RISC-V system. Eg. a @@ -9713,7 +9800,7 @@ Write the 32-bit value to authdata. The following commands allow direct access to the Debug Module Interface, which can be used to interact with custom debug features. -@deffn Command {riscv dmi_read} +@deffn Command {riscv dmi_read} address Perform a 32-bit DMI read at address, returning the value. @end deffn @@ -10524,7 +10611,13 @@ of a running target. Do not use GDB commands @command{continue}, and GDB would require stopping the target to get the prompt back. Do not use this mode under an IDE like Eclipse as it caches values of -previously shown varibles. +previously shown variables. + +It's also possible to connect more than one GDB to the same target by the +target's configuration option @code{-gdb-max-connections}. This allows, for +example, one GDB to run a script that continuously polls a set of variables +while other GDB can be used interactively. Be extremely careful in this case, +because the two GDB can easily get out-of-sync. @section RTOS Support @cindex RTOS Support @@ -10556,6 +10649,7 @@ Currently supported rtos's include: @item @option{mqx} @item @option{uCOS-III} @item @option{nuttx} +@item @option{RIOT} @item @option{hwthread} (This is not an actual RTOS. @xref{usingopenocdsmpwithgdb,,Using OpenOCD SMP with GDB}.) @end itemize @@ -10592,6 +10686,8 @@ _mqx_kernel_data, MQX_init_struct. OSRunning, OSTCBCurPtr, OSTaskDbgListPtr, OSTaskQty @item nuttx symbols g_readytorun, g_tasklisttable +@item RIOT symbols +sched_threads, sched_num_threads, sched_active_pid, max_threads, _tcb_name_offset @end table For most RTOS supported the above symbols will be exported by default. However for